Selectable Clock Source Switching for Fast RTC Startup
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Solution Overview
Problem
Existing compute devices face challenges in achieving fast boot times due to the long stabilization time of real-time clock (RTC) oscillators, which are critical for synchronous circuits, especially in power-efficient designs like those used in IoT and automotive applications, leading to increased costs and design complexity.
Innovation Solution
A selectable clock source system is implemented by adding a second oscillator, such as a 4 MHz clock, which can be switched with the existing RTC oscillator using phase detection mechanisms, allowing the RTC to stabilize in less than 15 ms without additional IO pins or power supplies, thus reducing lock time and overall boot time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If a low-frequency RTC oscillator (32 KHz) is used for power-efficient designs, then power consumption is reduced, but the stabilization time increases to a second or more
Solution Approach 1:
The system dynamically switches between two oscillator modes: a low-frequency 32 KHz oscillator for normal power-efficient operation, and a high-frequency 4 MHz oscillator for fast startup. The mode detection circuitry detects the reset signal state to determine which mode to activate, allowing the system to optimize between power consumption and stabilization time based on operational requirements
Solution Approach 2:
The invention changes the frequency parameter of the oscillator from a fixed 32 KHz to a selectable between 32 KHz and 4 MHz. By modifying this physical parameter, the system achieves different stabilization characteristics - the 4 MHz mode provides rapid stabilization in under 15 ms while the 32 KHz mode maintains low power consumption during normal operation
2Loss of time
If a second oscillator is added to reduce lock time, then boot time is reduced, but device complexity increases
Solution Approach 1:
The input signal lines of the RTC oscillator are designed to accept multiple types of signals - either a traditional crystal resonator for 32 KHz operation or an external clock signal for 4 MHz operation. This multi-functional input interface allows the same hardware infrastructure to support both oscillator modes without requiring separate dedicated circuits for each mode
Solution Approach 2:
Mode detection circuitry acts as an intermediary between the two oscillator modes and the rest of the system. This circuitry detects the reset signal state and automatically selects the appropriate oscillator mode, eliminating the need for complex manual configuration or additional control logic. The intermediary handles the complexity internally while presenting a simple interface to the external system
3Duration of action of stationary object
If traditional RTC architecture with coin cell battery is used, then continuous operation is enabled, but stabilization time remains long and additional power management complexity is added
Solution Approach 1:
The system performs preliminary action by pre-configuring the input signal lines to accept external clock signals and pre-establishing the mode detection logic. When power is applied, the circuitry is already prepared to rapidly detect the reset state and select the 4 MHz oscillator mode, achieving fast startup without requiring a coin cell battery to maintain continuous operation. The preliminary design decisions enable fast boot while simplifying power management
Data Source
AI summary
System and techniques for selectable clock sources are described herein. An electronic device includes an oscillator for a first clock signal and a tap on an input signal line to a resonator for the oscillator. The tap enables receipt of a second clock signal from an external oscillator. The electronic device includes mode selection circuitry to receives a signal from a tap to an existing input line to the electronic device. The mode selection circuitry uses this signal to select the oscillator output as the clock source or the tap on the input signal line as the clock source.