Variable Delay Line Clock Spreading for Harmonic Interference
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Solution Overview
Problem
Existing clock signal generation methods face challenges in adapting the level of spreading to suit different blocks within a device, leading to potential interference issues, especially in GSM devices where harmonics can degrade receiver sensitivity.
Innovation Solution
A method and circuitry that utilize a variable delay line to spread a clock signal by incrementing or decrementing a stored delay value based on randomly generated values for each edge, allowing for flexible adaptation of spreading levels and reducing harmonic interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a clock signal with constant period is used, then accurate timing is provided, but harmonics cause interference in reserved frequency bands
Solution Approach 1:
The patent applies dynamics by making the clock signal period variable rather than constant. A delay line with programmable delay elements introduces time variations to the clock signal edges, causing the period to fluctuate dynamically. This dynamic modification spreads the spectral energy of harmonics across a wider bandwidth, reducing peak PSD in reserved frequency bands while maintaining acceptable timing accuracy through controlled delay variations.
Solution Approach 2:
The patent changes the time domain parameter of the clock signal by introducing variable delays to edge transitions. By programmatically adjusting delay values in the delay line, the signal's temporal characteristics are modified to spread harmonic energy. This parameter change transforms the clock signal from having a fixed period to having a dynamically varying period, achieving spectral spreading without completely losing timing reference functionality.
2Object-generated harmful factors
If spread spectrum frequency dithering is applied to reduce harmonic interference, then PSD of harmonics is reduced, but clock signal accuracy for timing events is degraded
Solution Approach 1:
The patent applies local quality by selectively applying delay variations only to specific edges of the clock signal rather than uniformly dithering the entire signal. The programmable delay line introduces localized time shifts at discrete delay elements, creating spectral spreading primarily at harmonic frequencies while preserving the fundamental clock frequency accuracy. This localized approach reduces harmonic interference without completely degrading timing accuracy for critical operations.
3Object-generated harmful factors
If clock signal spreading is implemented within the clock signal generator, then harmonic interference is reduced, but the generator becomes more complex
Solution Approach 1:
The patent applies segmentation by dividing the clock signal path into separate functional blocks: the clock signal generator produces a clean reference clock, and a separate delay line with programmable delay elements performs the spreading function. This segmentation allows the clock generator to remain simple while the spreading functionality is implemented as an independent module that can be configured and controlled separately, reducing overall system complexity.
Data Source
AI summary
Method, circuitry and device for spreading a clock signal in which the clock signal is received at an input of a variable delay line, the clock signal having been generated by a clock signal generator. In one embodiment, for each edge of the clock signal, the delay introduced by the variable delay line is set in accordance with a stored delay value. For each of a plurality of consecutive edges of the clock signal, the stored delay value is either incremented or decremented based on a randomly generated value for that edge. A spread version of the clock signal is output from the variable delay line, wherein each edge of the spread version of the clock signal is delayed by the respective delay that is set for that edge of the clock signal.