Clock Stretching Control for Overclocking Under Voltage Droop

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Solution Overview

Problem

Existing integrated circuit processing units face challenges in maintaining power integrity during overclocking states due to supply voltage droops, which can degrade clock frequency and require higher voltage and frequency capabilities, making it difficult to reduce the impact of power supply droops effectively.

Innovation Solution

A system and method that dynamically senses output voltage characteristics and adjusts the clock rate of processing units to compensate for voltage droops during overclocking, using a clock generator with a voltage sensor, oscillation adjustment module, and clock oscillator to generate an output clock rate that maintains overclocking performance while reducing the impact of voltage droops.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If clock stretching is disabled during overclocking to maintain fixed frequency, then frequency stability is improved, but power supply droop impact increases

Engineering Contradiction:
Improvefrequency stabilityVSAvoidpower supply droop impact
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The system dynamically adjusts the clock frequency based on real-time voltage monitoring. When voltage droop is detected during overclocking, the clock frequency is temporarily reduced to compensate for the voltage drop, ensuring stable operation. This dynamic adjustment resolves the contradiction by allowing frequency to change adaptively rather than remaining fixed, thus mitigating power supply droop impact while maintaining operational reliability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system implements a feedback mechanism where voltage sensors continuously monitor the power supply voltage during overclocking operations. When voltage droop is detected, this information feeds back to the clock control logic, which then adjusts the clock frequency accordingly. This closed-loop feedback system enables the processor to automatically compensate for voltage variations, resolving the contradiction between frequency stability and power supply droop susceptibility.

Inventive Principle:
Principle #23Feedback

2Productivity

If voltage and frequency ranges are increased for overclocking, then performance is improved, but sensitivity to power supply droop increases

Engineering Contradiction:
Improveprocessing performanceVSAvoidvoltage droop sensitivity
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The system employs dynamic voltage and frequency scaling during overclocking operations. Rather than operating at a fixed high voltage and frequency, the system continuously monitors voltage levels and adjusts the operating frequency accordingly. When voltage droop occurs, the frequency is reduced to match the available voltage headroom, preventing operation beyond the safe operating area while maintaining maximum possible performance under current voltage conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters (voltage and frequency) based on real-time conditions. During overclocking, instead of maintaining fixed high parameters, the system dynamically modifies voltage and frequency settings in response to power supply conditions. This parameter adaptation allows the system to achieve high performance when voltage is stable while automatically reducing sensitivity to voltage droop when conditions deteriorate.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11835998B2System and method for enabling clock stretching during overclocking in response to voltage droop
Publication Date: 2023.12.05 ADVANCED MICRO DEVICES INC
  • US11835998B2 patent drawing
  • US11835998B2 patent drawing
  • US11835998B2 patent drawing

AI summary

Methods and apparatuses control the clock rate of a processing unit. The methods and apparatus control the clock rate by generating an output clock rate based on the determined frequency adjustment such that the processing unit maintains the overclocking. The methods include: receiving an analog voltage supply in response to detecting overclocking in the processing unit; dynamically sensing measurements of an output voltage from a voltage generator based on the received analog voltage supply; determining characteristics of a voltage droop in the output voltage based on the dynamically sensed output voltage measurements; determining a frequency adjustment for the clock rate of the processing unit based on the determined characteristics of the voltage droop; and generating an output clock rate based on the determined frequency adjustment such that the processing unit maintains the overclocking.