Clock Sub-Signal Segmentation for Imager Signal Integrity

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Solution Overview

Problem

High-frequency clock signals used in imager circuits suffer significant deformation when propagated over long distances due to capacitive load, making it impractical to use a single clock signal generator for large pixel matrices, as conventional follower amplifiers cannot reshape signals with edge durations longer than a quarter of the period.

Innovation Solution

Generating multiple clock sub-signals with frequencies lower than the reference frequency, phase-shifted by π/N, and propagating them over paths where each sub-signal's edge duration is longer than a quarter of its period, then combining them using EXCLUSIVE OR operations to produce a high-frequency reference clock signal with reduced deformation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a high-frequency clock signal is propagated over long distances, then the precision of analog-digital conversion is improved, but the signal deformation increases

Engineering Contradiction:
Improveprecision of analog-digital conversionVSAvoidsignal deformation
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The high-frequency clock signal is segmented into multiple lower-frequency sub-signals (e.g., two 400 MHz sub-signals to create an 800 MHz clock signal). Each sub-signal is propagated separately over long distances where it maintains acceptable signal integrity, then combined at the destination to reconstruct the high-frequency clock signal, thereby avoiding the deformation that occurs when propagating the full high-frequency signal directly

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Lower-frequency sub-signals act as intermediaries to transmit timing information over long propagation paths. These sub-signals serve as carriers that can traverse the propagation path without significant deformation, and their combination at the destination reconstructs the original high-frequency clock signal, enabling precise analog-digital conversion far from the clock generator

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If the frequency of the clock signal is increased, then the precision of analog-digital conversion is improved, but the signal deformation increases

Engineering Contradiction:
Improveprecision of analog-digital conversionVSAvoidsignal edge duration
Core Design Contradiction:
Measurement precisionVSManufacturing precision

Solution Approach 1:

The high-frequency clock signal is segmented into multiple lower-frequency sub-signals (e.g., two 400 MHz sub-signals to create an 800 MHz clock signal). Each sub-signal is propagated separately over long distances where it maintains acceptable signal integrity, then combined at the destination to reconstruct the high-frequency clock signal, thereby avoiding the deformation that occurs when propagating the full high-frequency signal directly

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The frequency parameter of the clock signal is changed during propagation. Instead of transmitting the high-frequency signal directly, the system transmits lower-frequency sub-signals (400 MHz instead of 800 MHz) over the propagation path, which have longer edge durations that are less susceptible to deformation. At the destination, these sub-signals are combined to regenerate the original high-frequency signal with proper edge characteristics

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10042000B2Method and apparatus for high frequency analog-to-digital conversion
Publication Date: 2018.08.07 STMICROELECTRONICS (GRENOBLE 2) SAS
  • US10042000B2 patent drawing
  • US10042000B2 patent drawing
  • US10042000B2 patent drawing

AI summary

A method can be used to generate a reference clock signal having a reference frequency. N clock sub-signals are generated, where N is greater than or equal to 2. The N clock sub-signals are successively mutually shifted out of phase by π/N and each clock sub-signal has an elementary frequency that is equal to the reference frequency divided by N. The N clock sub-signals are propagated over propagation paths. The elementary frequency and a length of the longest propagation path are chosen so that each sub-signal has an acceptable degree of deformation. The duration of each sub-signal edge is longer than quarter of the period of the reference frequency. The reference clock signal is generated by EXCLUSIVE OR combining the propagated clock sub-signals at the end of their respective propagation paths.