Clock-Switched Output Buffer Driving to Reduce Signal Jitter
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Solution Overview
Problem
Existing output devices experience jitter in output signals due to varying current consumption with data signal changes, leading to increased power-supply noise and circuit complexity, especially when multiple devices share the same power supply.
Innovation Solution
An output device design featuring a driving unit with dual driving circuits and a signal switching device that synchronizes the operation of buffer switches with the clock signal, ensuring consistent current consumption at clock edges, thereby reducing jitter without the need for additional circuitry like cancel data generating circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the output device uses a single power supply for both the driving unit and output buffer, then the circuit complexity is reduced, but the jitter in the output signal increases due to varying current consumption
Solution Approach 1:
The power supply system is segmented into two independent power supplies: a first power supply for the driving unit and a second power supply for the output buffer. This segmentation isolates the current consumption variations of the driving unit from the output buffer, preventing jitter while maintaining manageable circuit complexity through modular power management.
Solution Approach 2:
A level shifter is introduced as an intermediary component between the driving unit and the output buffer. The level shifter adapts the output signal level from the driving unit to match the input level requirements of the output buffer, enabling independent power supplies while maintaining signal integrity and reducing jitter.
2Reliability
If different power supplies are used for the driving unit and output buffer, then the jitter is reduced, but the device complexity increases
Solution Approach 1:
The level shifter performs multiple functions: it adapts signal levels between different power domains, provides impedance matching, and enables independent power supply operation. This multi-functionality justifies the added component by consolidating several requirements into a single intermediary element.
3Adaptability or versatility
If the flip-flop and driving circuits operate at the voltage of the power supply used by the output buffer, then the voltage levels match, but the current consumption increases leading to more power-supply noise
Solution Approach 1:
The level shifter acts as an intermediary that enables voltage level adaptation without requiring the driving unit to operate at the output buffer's power supply voltage. This allows the driving unit to use its own optimized power supply while still achieving compatible voltage levels at the interface through the level-shifting function.
Data Source
AI summary
An output device receives a data signal, outputs an output signal corresponding to the data signal in synchronization with a clock signal, and includes a driving unit configured to drive an output buffer that outputs the output signal. The driving unit includes a signal switching unit and first and second driving circuits that operate with the same power supply. The signal switching unit inputs the clock signal into one of the first and second driving circuits in accordance with the level of the data signal, and the one of the first and second driving circuits outputs a driving signal whose level varies in accordance with a change in the level of the clock signal to the output buffer.