Clock Switching Circuit for Glitch-Free Internal-External Sync
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing clock switching circuits in synchronous electronic devices often produce artifacts such as glitches or dropped clock cycles when switching between internal and external clock signals, which can disrupt device operation and affect voltage regulation in power converters.
Innovation Solution
A clock switch with a phase shift module and clock-sync controller that synchronizes the internal clock signal with an external clock signal by adjusting its frequency using a controllable divisor, and a multiplexer that switches between the adjusted internal and external clock signals based on synchronization conditions, minimizing artifacts and ensuring seamless switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a clock switch is used to route between internal and external clock signals, then clock signal routing flexibility is improved, but artifacts such as glitches or dropped clock cycles are generated during switching
Solution Approach 1:
The patent applies preliminary action by synchronizing the internal clock signal with the external clock signal before switching occurs. The clock-sync controller adjusts the phase of the internal clock signal in advance using a phase shift module, ensuring that when the multiplexer switches between clock sources, both signals are already synchronized, thereby preventing glitches and dropped cycles.
Solution Approach 2:
The patent introduces intermediary components between the clock sources and the output: a phase shift module that acts as a mediator to adjust the internal clock signal, and a clock-sync controller that coordinates the synchronization process. These intermediaries ensure smooth transitions during clock switching by preparing the signals in advance.
2Reliability
If the internal clock signal is adjusted to synchronize with external clock, then switching artifacts are reduced, but additional circuit complexity is introduced
Solution Approach 1:
The patent applies universality by designing the phase shift module and clock-sync controller to perform multiple functions: they not only synchronize clock signals but also maintain the spread spectrum properties of the internal clock when needed. The same circuitry handles both synchronization and preservation of clock characteristics, reducing the need for separate dedicated circuits.
Solution Approach 2:
The patent uses parameter changes by dynamically adjusting the phase shift amount based on the frequency difference between internal and external clocks. The clock-sync controller modifies the divisor value in the phase shift module to achieve synchronization, changing operational parameters rather than requiring complex structural modifications.
3Object-affected harmful factors
If spread spectrum clock properties are maintained during switching, then electromagnetic interference is reduced, but synchronization complexity increases
Solution Approach 1:
The patent applies dynamics by making the synchronization process adaptive rather than static. The clock-sync controller continuously monitors the frequency difference between internal and external clocks and dynamically adjusts the phase shift amount accordingly. This dynamic adjustment allows the system to maintain spread spectrum properties while adapting to different clock frequency conditions.
Data Source
AI summary
Circuits and methods for switching between an internal clock and an external clock without causing an interruption or an artifact in the switched clock signal are disclosed. To achieve this, the internal clock signal is synchronized with the external clock signal prior to switching. The synchronization may be accomplished using two possible clock-synchronization methods: a first method that passively waits for the clocks to synchronize over time and a second that adjusts a period of the internal clock signal to actively synchronize the clocks. The method selected for use requires the fewest clock cycles to reach synchronization, which is determined by a frequency difference between the two clock frequencies. After clock-synchronization, the output clock signal spectrum will be substantially the same before and after switching between the clock signals, and therefore is suitable for use with spread spectrum clocks.