Clock Switching Circuit With Latch Reset for Missing Clocks
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing clock switching devices fail to seamlessly select and transmit appropriate clock signals to functional circuits, particularly when one clock signal is missing, leading to system malfunctions due to erroneous latch states and continuous transmission of missing signals.
Innovation Solution
A clock switching device comprising multiple latch circuits and a switching circuit that selects one of several clock signals based on selection signals, with a reset mechanism to immediately address the absence of a clock signal by resetting dependent latch circuits, ensuring continuous operation by selecting an alternative clock signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a clock switching device uses multiple latch circuits to select among multiple clock signals, then the adaptability and functionality are improved, but the device complexity increases
Solution Approach 1:
The clock switching device is segmented into multiple independent latch circuits (first latch circuit, second latch circuit), each responsible for latching a specific selection signal. This segmentation allows each latch circuit to operate independently, managing complexity through modular design while maintaining the ability to select among multiple clock signals.
Solution Approach 2:
The latch circuits are designed with universal functionality to handle multiple clock signals (first clock signal, second clock signal) and multiple selection signals. Each latch circuit can latch different selection signals based on different clock signals, making the overall device adaptable to various clocking scenarios without requiring entirely separate circuits for each function.
2Stability of the object's composition
If the second latch circuit continuously latches the selection signal based on the second clock signal, then the latch state is maintained, but system reliability deteriorates when the second clock signal is missing
Solution Approach 1:
A feedback mechanism is implemented where the output of the first latch circuit is fed back to the reset terminal of the second latch circuit. When the first latch circuit detects that the second clock signal is missing or invalid, it generates a reset signal that immediately resets the second latch circuit, preventing it from maintaining erroneous latch states and ensuring system reliability.
Solution Approach 2:
The reset mechanism provides preliminary anti-action by preemptively resetting the second latch circuit when the first latch circuit detects problematic conditions in the second clock signal. This prevents the second latch circuit from entering or maintaining incorrect states, countacting potential reliability issues before they can cause system failure.
3Stability of the object's composition
If the switching circuit waits for the second latch circuit to naturally update its state, then the switching operation is stable, but the response time increases when a clock signal is missing
Solution Approach 1:
The first latch circuit performs preliminary action by continuously monitoring the status of the second clock signal and preparing a reset signal. When the second clock signal is missing, the reset signal is immediately generated and applied to the second latch circuit, eliminating the need to wait for natural state updates and reducing switching delay while maintaining stability.
Data Source
AI summary
Provided is a clock switching device including a first latch circuit, a second latch circuit, and a switching circuit. The first latch circuit latches a first selection signal based on triggering of a first clock signal. The second latch circuit latches a second selection signal based on triggering of a second clock signal. A reset terminal of the second latch circuit is coupled to the first latch circuit. The second latch circuit is selectively reset based on an output of the first latch circuit. The switching circuit is coupled to an output terminal of the first latch circuit and an output terminal of the second latch circuit. The switching circuit selects one of the clock signals as an output clock signal of the clock switching device based on the selection signals.