Clock Synchronization Algorithm Without Frequency Error Estimation
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Solution Overview
Problem
Existing network clock synchronization protocols face challenges in achieving accurate time synchronization across multiple nodes in computer systems due to frequency variations in hardware clocks and latency-induced errors, often requiring explicit skew estimation and additional hardware, which can be costly and complex.
Innovation Solution
A clock synchronization system that uses a simple algorithm to compensate for clock skew without explicit estimation, relying solely on current offset information and an exponential average of past offsets, eliminating the need for expensive computations and special hardware, and ensuring convergence even in the presence of timing loops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If explicit skew estimation mechanisms are used in clock synchronization protocols, then frequency accuracy can be improved, but system complexity and computational cost increase
Solution Approach 1:
The patent extracts and eliminates the skew estimation mechanism from the clock synchronization system. By removing this complex component, the system achieves sufficient synchronization accuracy through simpler offset correction alone, resolving the contradiction between measurement precision and device complexity
Solution Approach 2:
The patent replaces expensive, complex skew estimation mechanisms with cheap, simple offset correction algorithms. This substitution uses computationally inexpensive operations that achieve adequate precision without requiring sophisticated hardware or complex computational resources
2Measurement precision
If special hardware support is added to achieve sub-microsecond accuracy, then measurement precision improves, but device complexity and cost increase
Solution Approach 1:
The patent substitutes mechanical/hardware-based precision mechanisms with software-based algorithms. By using intelligent software processing to achieve time synchronization accuracy, the system eliminates the need for special hardware support while maintaining sub-microsecond precision
Solution Approach 2:
The patent creates a virtual time reference through software algorithms that replicates the function of expensive hardware time synchronization devices. This virtual copy achieves comparable accuracy without requiring physical hardware infrastructure
3Measurement precision
If frequent offset corrections are applied to maintain synchronization, then time accuracy improves, but system stability deteriorates due to jitter
Solution Approach 1:
The patent applies partial correction by using a damping factor that prevents full correction of offset errors. This partial action approach corrects synchronization drift while avoiding the instability and jitter that would result from aggressive, excessive corrections
Solution Approach 2:
The patent implements beforehand cushioning by using exponential averaging to smooth offset measurements before applying corrections. This pre-processing cushioning prevents sudden correction spikes that would cause jitter and instability in the synchronization system
Data Source
AI summary
A clock synchronization system and methods including an algorithm, or protocol, that synchronizes to any source of time without the need of estimating frequency errors and only performing frequency adaptions. Specifically, a clock synchronization protocol synchronizes networked nodes without explicit estimation of the clock skews and steep corrections on the time. The algorithm is guaranteed to converge even in the presence of timing loops which allow different clients to share timing information and even collectively outperform individual clients when the time source has large jitter.