Clock Synchronization Circuit for Switch Mode Power Supply
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Solution Overview
Problem
Switch mode power supplies often face challenges in synchronizing with a common external clock to improve EMI and power conversion efficiency, as existing solutions fail to seamlessly transition between internal and external clocks, leading to output voltage disturbances.
Innovation Solution
A synchronization circuit that monitors the external clock's switching period and generates replacement clock pulses when it drops out, allowing the power supply to switch back to the internal clock after a predetermined number of replacements, ensuring minimal disturbance in output voltage by synchronizing the transition edges of both clocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the power supply switches from internal clock to external clock, then synchronization is improved, but output voltage disturbance occurs during transition
Solution Approach 1:
The circuit generates replacement clock pulses in advance when the external clock drops out, and switches back to the internal clock after a predetermined number of replacements. This preliminary preparation of replacement clocks prevents voltage disturbance by ensuring a smooth transition is already planned and ready.
Solution Approach 2:
The synchronization circuit actively monitors the external clock's switching period and detects dropout conditions. This feedback mechanism allows the circuit to respond dynamically to clock instability, generating replacement pulses only when necessary and switching back when the external clock is stable, thereby minimizing unnecessary transitions and voltage disturbances.
2Reliability
If the external clock is monitored and replacement pulses are generated, then clock stability is improved, but device complexity increases
Solution Approach 1:
The synchronization circuit acts as an intermediary between the external clock and the power supply. It monitors the external clock, generates replacement pulses when needed, and manages the switching between internal and external clocks. This intermediary role isolates the power supply from direct exposure to external clock instability, maintaining reliability while containing complexity in a dedicated synchronization module.
3Adaptability or versatility
If the power supply remains on internal clock, then operational independence is maintained, but EMI and power conversion efficiency deteriorate
Solution Approach 1:
The clock source is made dynamic rather than static. The power supply can switch between internal and external clock sources depending on conditions. When an external clock is available and stable, the system uses it to improve EMI and efficiency. When the external clock drops out or becomes unstable, the system automatically switches back to the internal clock, maintaining operational independence. This dynamic adaptability resolves the contradiction between independence and performance.
Data Source
AI summary
A circuit and method for switching between a system's internal clock and an external synchronization clock when a stable external clock has been detected, and for switching back to operating the system using said internal clock when a predetermined number of sequential external clock pulses exceed a predetermined switching period dropout threshold or are otherwise missing.