Clock Synchronization Monitoring in Serial Interface Circuits

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Solution Overview

Problem

Semiconductor integrated circuits face misoperation due to unsynchronized signals and clocks, leading to erroneous signal reception, necessitating precise synchronization monitoring.

Innovation Solution

A semiconductor apparatus comprising a pattern conversion circuit, transmission circuit, reception circuit, and monitoring circuit that convert and synchronize parallel input data into serial data and monitor synchronization with multiple clocks to generate a result signal, ensuring accurate data transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If synchronous transmission with clock is used to increase operation speed, then productivity is improved, but reliability deteriorates due to synchronization errors between signals and clocks

Engineering Contradiction:
Improveoperation speedVSAvoidsynchronization accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by generating test patterns and performing synchronization tests before actual data transmission. The pattern conversion circuit pre-processes test data into specific patterns (such as alternating 0-1 patterns) that are transmitted through the interface to verify clock-signal synchronization beforehand, preventing misoperation due to timing errors

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through the monitoring circuit that continuously monitors the synchronization between clocks and signals during transmission. The monitoring circuit generates a result signal based on comparison between expected and actual signal timings, providing feedback information that indicates whether synchronization is maintained, allowing the system to detect and respond to timing errors

Inventive Principle:
Principle #23Feedback

2Reliability

If monitoring circuit is added to ensure synchronization, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvesynchronization monitoringVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing the pattern conversion circuit to serve dual purposes: it converts normal data patterns for regular transmission and generates special test patterns for synchronization monitoring. The monitoring circuit also serves multiple functions by comparing signal timings, generating result signals, and providing synchronization status information, thereby reducing the need for separate dedicated monitoring components

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements self-service through the monitoring circuit that autonomously performs synchronization verification without external intervention. The circuit automatically compares signal arrival times with clock timings, generates comparison results, and provides synchronization status indicators, enabling the system to self-diagnose timing issues without requiring external testing equipment

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9948321B2Semiconductor apparatus
Publication Date: 2018.04.17 SK HYNIX INC
  • US9948321B2 patent drawing
  • US9948321B2 patent drawing
  • US9948321B2 patent drawing

AI summary

A semiconductor apparatus includes a pattern conversion circuit configured to generate conversion data in response to a monitoring enable signal, pattern select signals and parallel input data; a transmission circuit configured to output the conversion data as serial data in response to a plurality of clocks; a reception circuit configured to output the serial data as parallel output data in synchronization with the plurality of clocks; and a monitoring circuit configured to generate a result signal in response to the plurality of clocks, clock select signals and the serial data.