Clock Synchronization via Neighboring Hosts for Asymmetric Delay Correction
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Solution Overview
Problem
Conventional clock synchronization methods suffer from low precision due to asymmetric one-way delays in round trips between hosts, leading to significant errors in clock synchronization.
Innovation Solution
A method to determine a fourth clock offset by averaging M calculated clock offsets and a third clock offset, obtained from neighboring hosts and a reference host, using formulas that account for asymmetric one-way delays, thereby correcting the clock of a first host for precise synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional NTP method is used to perform clock synchronization, then the clock synchronization can be implemented, but the precision is low due to asymmetric one-way delays
Solution Approach 1:
The patent segments the clock synchronization process into multiple measurement paths by introducing M neighboring hosts as intermediate nodes. Each neighboring host provides an independent measurement path between the first host and reference host, allowing the system to divide the single asymmetric path into multiple paths for averaging, thereby reducing the impact of asymmetric one-way delays on synchronization precision.
Solution Approach 2:
The patent combines multiple clock offset measurements from different neighboring hosts to determine the final fourth clock offset. By merging M first clock offsets and M second clock offsets through calculation and averaging, the system consolidates multiple measurements to achieve higher precision synchronization that overcomes the limitations of any single asymmetric path.
2Measurement precision
If multiple neighboring hosts are introduced to improve synchronization precision, then the measurement accuracy increases, but the device complexity increases
Solution Approach 1:
The neighboring hosts serve multiple functions in the system: they act as intermediate measurement nodes for clock offset calculation, provide redundant paths for precision improvement, and can be dynamically selected or replaced. This multi-functionality allows the system to achieve higher precision without proportionally increasing complexity, as the same neighboring hosts fulfill multiple roles in the synchronization architecture.
Solution Approach 2:
The patent changes the parameter M (number of neighboring hosts) as a configurable variable that can be adjusted based on precision requirements and system constraints. By making M a tunable parameter rather than a fixed value, the system can optimize the balance between measurement precision and device complexity, using more neighboring hosts when high precision is needed and fewer when simplicity is prioritized.
Data Source
AI summary
This application discloses a clock synchronization method and a device, a storage medium. The method includes: obtaining M first clock offsets, M second clock offsets, and a third clock offset; determining a fourth clock offset based on the M first clock offsets, the M second clock offsets, and the third clock offset; and correcting a clock of a first host based on the fourth clock offset, to implement clock synchronization between the first host and a reference host. In this way, precision of clock synchronization between the first host and the reference host can be further improved, thereby reducing a clock synchronization error.