Multi-Node Clock Synchronization with Automatic Source Selection
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Solution Overview
Problem
In computer systems with multiple nodes, existing technologies rely on a single clock source for synchronization, leading to failure if the primary clock malfunctions, disrupting the entire partition system's operation.
Innovation Solution
A computer system with a selecting module and a clock controlling module in each node, allowing nodes to select a common clock source and switch to alternative clock channels recorded in a clock relation connection table when the primary clock fails, ensuring continuous synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single clock source is used for synchronization in a partition system, then clock synchronization is achieved, but system reliability deteriorates when the clock malfunctions
Solution Approach 1:
The patent divides the clock source into multiple independent nodes within the partition system. Each node can serve as a potential clock source, and the system segments the single-point-of-failure architecture into a distributed multi-source architecture, thereby improving reliability while maintaining manageable complexity through modular design
Solution Approach 2:
The patent combines multiple clock sources from different nodes into a unified synchronization system. The selecting modules at each node integrate multiple clock inputs and automatically select the most appropriate clock source, merging redundant resources to achieve both reliability and simplified operation
2Reliability
If multiple clock sources are provided for fault tolerance, then system reliability improves, but device complexity increases
Solution Approach 1:
The patent implements self-service through automatic clock source selection. Each node's selecting module autonomously monitors the status of multiple clock sources and automatically switches between them based on predetermined criteria, eliminating the need for manual intervention and reducing operational complexity despite the presence of multiple clock sources
Solution Approach 2:
The patent employs feedback mechanisms where the clock controlling module continuously monitors clock source status and provides real-time information to selecting modules. This feedback loop enables automatic detection of clock failures and triggers appropriate switching actions, managing complexity through intelligent control rather than complex hardware
3Productivity
If a single clock source is used, then device complexity is reduced, but system productivity deteriorates due to potential system disruption
Solution Approach 1:
The patent applies preliminary action by pre-configuring multiple clock sources and establishing selection criteria before failures occur. The system is prepared in advance with backup clock sources and automatic switching logic, ensuring continuous operation without disruption when failures happen, thereby maintaining productivity without excessive complexity
Data Source
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AI summary
The present invention relates to a computer system and a clock configuring method. The computer system comprises at least two nodes, wherein each of the at least two nodes includes a selecting module and a CPU, inputs to the selecting module comprise a clock of the local node and a clock output from other node, and an output terminal thereof is connected to the CPU and an input terminal of the selecting module of other node; the computer system further comprises a clock controlling module, whose output terminal is connected to a control terminal of the selecting module to control the clocks of the at least two nodes to be the same clock. When clocks of plural nodes are abnormal, the computer system can still normally operate as long as there is a normal clock in the computer system.