Clock Synchronization via Packet Delay Skew Correction
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Solution Overview
Problem
Existing clock synchronization methods over packet networks face challenges due to packet delay variation (PDV) and phase noise, especially in congested networks and mobile scenarios, where the assumption of symmetrical Gaussian distribution is not valid, limiting the accuracy of local clock synchronization.
Innovation Solution
A method that filters timing packets to adjust for packet delay distribution skew, using a phase locked loop with a skew correction unit to modify arrival times and improve synchronization accuracy, allowing for fewer timing packets to be sent while maintaining precision, by determining skew through real-time transport packets and employing a Hurst calculation for drift detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If timing packets are sent frequently to maintain synchronization accuracy, then synchronization precision is improved, but network congestion increases
Solution Approach 1:
The patent changes the statistical parameters used for filtering by introducing skewness correction to the existing Gaussian filtering approach. This allows the system to maintain synchronization accuracy with fewer packets by more effectively extracting timing information from each received packet, thereby reducing the quantity of timing packets needed while preserving measurement precision.
2Stability of the object's composition
If statistical filtering is applied to reduce phase noise, then clock stability is improved, but accuracy is limited by symmetrical distribution assumption
Solution Approach 1:
The patent introduces asymmetry correction by detecting and compensating for skewness in the packet delay distribution. The system calculates a skewness parameter from the timing packet delays and adjusts the filtering process to account for this asymmetry, thereby improving timing accuracy while maintaining clock stability through the filtering mechanism.
Solution Approach 2:
The patent implements feedback by continuously monitoring the skewness of packet delay distribution and dynamically adjusting the filtering parameters accordingly. The system measures the actual delay distribution characteristics and uses this information to correct the filtering process, creating a closed-loop system that adapts to changing network conditions to maintain both stability and accuracy.
3Reliability
If multiple network paths are used to minimize packet delay variation, then timing reliability is improved, but network congestion increases
Solution Approach 1:
The patent changes the statistical parameters used for filtering by introducing skewness correction to the existing Gaussian filtering approach. This allows the system to maintain synchronization accuracy with fewer packets by more effectively extracting timing information from each received packet, thereby reducing the quantity of timing packets needed while preserving measurement precision.
Data Source
AI summary
In a computer-implemented method of adjusting a local clock at a receiver in a packet network, the local clock is generated by a phase locked loop locked to a master clock with the aid of time-stamped timing packets arriving over the network from the master clock with a packet delay distribution about a nominal delay. The timing packets are filtered to adjust for the packet delay distribution. A control input for the phase locked loop is derived from the timing packets. The amount of skew in the packet delay distribution about the nominal delay is determined, and the arrival times of timing packets are then selectively modified to correct for the amount of skew in the packet delay variation distribution prior to filtering the timing packets.