Clock Synthesizer INL Compensation for Low-Jitter DTC Interpolation

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Solution Overview

Problem

Existing digital-to-time converters (DTCs) in clock synthesizers suffer from non-linear effects that result in significant output clock jitter, which is not effectively compensated by pre-calibration methods due to temperature variations and non-linear interpolation points.

Innovation Solution

A method employing two paths with digital controlled oscillators (DCOs) and digital-to-time converters (DTCs), where a deliberate initial delay in one path is compensated by an analog delay in the other, allowing for adaptive adjustment of non-linear distortion by averaging measurements to derive discrete distortion values, effectively treating them as constants for circuit correction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If pre-calibration is used to eliminate non-linear distortion in DTC, then interpolation accuracy is improved, but the system must be constantly adjusted to compensate for temperature variations

Engineering Contradiction:
Improveinterpolation accuracyVSAvoidtemperature compensation capability
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent implements a feedback mechanism where the actual delay of the analog delay element is measured by comparing it with a digital delay, and the measured non-linear distortion values are used to adjust the DTC compensation values. This closed-loop feedback allows the system to adapt to temperature variations and other environmental changes, resolving the contradiction between initial calibration accuracy and ongoing adaptability.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent performs preliminary measurement of non-linear distortion by introducing deliberate initial delays and measuring the corresponding actual delays. These pre-measured distortion values are stored and used to pre-calculate compensation values that are applied to the DTC. This preliminary action reduces the impact of temperature variations during normal operation.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If analog delay elements are used to compensate for non-linear distortion, then measurement precision is improved, but non-linear distortion remains significant without proper compensation

Engineering Contradiction:
Improvedelay measurement accuracyVSAvoidnon-linear distortion
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent converts the harmful non-linear distortion effect into a useful measurement signal. By deliberately introducing known initial delays and measuring the actual delays produced by the non-linear analog delay element, the system characterizes the distortion and then uses this characterization to compensate for it. The harmful non-linearity becomes the basis for creating accurate compensation values.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent introduces a digital delay element as an intermediary reference to measure the actual delay of the analog delay element. This intermediary allows for precise measurement of the non-linear distortion without directly modifying the analog delay path, enabling accurate characterization and subsequent compensation of the distortion.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If multiple measurements are averaged to derive distortion values, then compensation accuracy is improved, but processing time increases

Engineering Contradiction:
Improvedistortion measurement accuracyVSAvoidcompensation calculation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs the time-consuming multiple measurements and averaging process in advance, during an initialization or calibration phase. The measured non-linear distortion values and calculated compensation values are stored in memory. During normal operation, the pre-calculated compensation values are simply retrieved and applied, avoiding the time loss during critical timing operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10128826B2Clock synthesizer with integral non-linear interpolation (INL) distortion compensation
Publication Date: 2018.11.13 MICROSEMI SEMICON
  • US10128826B2 patent drawing
  • US10128826B2 patent drawing
  • US10128826B2 patent drawing

AI summary

A method of compensating for integral nonlinear interpolation (INL) distortion in a clock synthesizer driven by a system clock running at a frequency fsys, involves introducing a selected nominal analog delay I*dt with an actual delay of I*dt+δ at the output of the a first path with a digital controlled oscillator (DCO) and a digital-to-time converter (DTC) and a nominal digital delay I*D with an actual delay of I*D+Δ at the input of a second path with a DCO and a DTC that offsets the actual analog delay in the first path, adjusting the contents x(k) of a compensation module in the second path to align the output pulses of the first and second paths for different values of k, where k represents an interpolation point, iteratively repeating the two preceding steps for all N values of I, and averaging the contents x(k) of the compensation module to derive the compensation values to be applied to a one of the DTCs to correct for INL distortion.