Clock Distribution Using TIA-Biquad Filtering for Long Interconnects

Solution Overview

Problem

Integrated circuits face challenges in transmitting high-speed clock signals over long distances due to bandwidth limitations caused by resistance and capacitance in transmission lines, leading to power consumption and area occupancy issues with existing buffer solutions.

Innovation Solution

A clock distribution system incorporating a voltage-to-current converter, transimpedance amplifier, and biquad filter with cross-coupled transistors providing positive feedback, which eliminates the need for buffers by maintaining low input impedance and reducing parasitic capacitance, thereby allowing signal transmission over long channels without repeaters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If multiple CMOS or CML buffers are inserted every 100-200 microns or 500 microns to overcome bandwidth limitations, then the bandwidth for the clock is improved, but the area occupied and power consumed increase

Engineering Contradiction:

ImprovebandwidthVSAvoidarea occupied

Core Design Contradiction:

SpeedVSArea of stationary object

Solution Approach 1:

The patent extracts and eliminates the buffer components from the clock distribution system by transforming the signal representation from voltage-based to current-based. This removal of buffers directly reduces the area occupied on the IC while maintaining bandwidth through the inherent properties of current-mode transmission.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent substitutes the mechanical/electrical buffer components with a field-based current transmission approach. By using current-mode logic and eliminating physical buffer stages, the system replaces what would traditionally require discrete components with a field-oriented signal transmission method, reducing area while preserving signal integrity and bandwidth.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Speed

If multiple CMOS or CML buffers are inserted every 100-200 microns or 500 microns to overcome bandwidth limitations, then the bandwidth for the clock is improved, but the power consumed increases

Engineering Contradiction:

ImprovebandwidthVSAvoidpower consumed

Core Design Contradiction:

SpeedVSUse of energy by stationary object

Solution Approach 1:

The patent extracts and eliminates the buffer components from the clock distribution system by transforming the signal representation from voltage-based to current-based. This removal of buffers directly reduces the area occupied on the IC while maintaining bandwidth through the inherent properties of current-mode transmission.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent substitutes the mechanical/electrical buffer components with a field-based current transmission approach. By using current-mode logic and eliminating physical buffer stages, the system replaces what would traditionally require discrete components with a field-oriented signal transmission method, reducing area while preserving signal integrity and bandwidth.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Length of moving object

If transmission line with resistance and capacitance is used for clock signal, then the clock signal can be transmitted, but the bandwidth is limited

Engineering Contradiction:

Improvetransmission distanceVSAvoidbandwidth

Core Design Contradiction:

Length of moving objectVSSpeed

Solution Approach 1:

The patent substitutes the mechanical/electrical buffer components with a field-based current transmission approach. By using current-mode logic and eliminating physical buffer stages, the system replaces what would traditionally require discrete components with a field-oriented signal transmission method, reducing area while preserving signal integrity and bandwidth.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent fundamentally changes the parameter of signal representation from voltage-mode to current-mode. This parameter transformation alters the interaction with transmission line resistance and capacitance, allowing signals to maintain integrity over longer distances without the bandwidth degradation that plagues voltage-based systems.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances signal integrity and reduces power consumption and area usage by maintaining signal quality and reducing duty cycle distortion, achieving efficient clock signal transmission over long distances without the need for additional buffers.

Implementation Method 1

The transimpedance amplifier includes cross-coupled transistors configured to use positive feedback

Methodology Applied

Scientific EffectPositive feedback: Feedback

Data Source

PatentUS12088299B2Clock distribution with transimpedance amplifier and biquad filter

Publication Date: 2024.09.10 TEXAS INSTRUMENTS INC

AI summary

An integrated circuit (IC) includes a voltage-to-current converter circuit having a first voltage terminal, a second voltage terminal, a first current terminal, and a second current terminal. A transimpedance amplifier (TIA) and biquad filter circuit has a first TIA and biquad filter input coupled to the first current terminal and has a second TIA and biquad filter input coupled to the second current terminal. The transimpedance amplifier includes cross-coupled transistors configured to use positive feedback.