Clock Timing Compensation for Low-Power Wake-Up Precision
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Solution Overview
Problem
Mobile devices face performance degradation due to imprecise clock frequency caused by temperature variations when switching from a temperature-compensated crystal oscillator to a conventional crystal oscillator for power saving, leading to increased power consumption and reduced battery life.
Innovation Solution
A clock system with a clock signal generating circuit and a controlling circuit that generates a primary and reference clock signal, where the primary clock signal is deactivated during power saving mode and reactivated with compensated timing information from the reference clock signal upon exiting the mode, ensuring precise timing and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a conventional crystal oscillator is used instead of a temperature-compensated crystal oscillator during power saving mode, then power consumption is reduced, but timing precision deteriorates due to temperature sensitivity
Solution Approach 1:
The patent applies preliminary action by performing timing information compensation before the power saving mode begins. The system calculates and applies compensation values to the conventional crystal oscillator's timing information based on temperature data, so that when power saving mode starts, the timing information is already corrected for temperature drift. This allows the system to use the low-power conventional oscillator while maintaining accurate timing.
Solution Approach 2:
The patent changes the timing information parameter of the conventional crystal oscillator by applying compensation values derived from temperature measurements. The system monitors temperature changes and adjusts the timing information accordingly, transforming the conventional oscillator's temperature-sensitive output into temperature-compensated timing information without requiring a temperature-compensated crystal oscillator.
2Measurement precision
If a temperature-compensated crystal oscillator is used continuously, then timing precision is maintained, but power consumption increases
Solution Approach 1:
The patent implements periodic action by switching between two operational modes: during power saving mode, the system uses the conventional crystal oscillator with compensated timing information; during normal mode, it uses the temperature-compensated crystal oscillator. This periodic switching allows the system to maintain timing precision when needed while reducing power consumption during periods when full precision is less critical.
Solution Approach 2:
The system provides self-service by using the conventional crystal oscillator's output combined with temperature-based compensation calculations to generate accurate timing information without continuously relying on the power-hungry temperature-compensated crystal oscillator. The compensation mechanism essentially allows the conventional oscillator to serve the dual purpose of low power consumption and adequate timing accuracy.
3Use of energy by moving object
If the primary clock signal is deactivated during power saving mode, then power consumption decreases, but signal re-acquisition time increases upon exiting power saving mode
Solution Approach 1:
The patent applies preliminary action by maintaining the running state of the primary clock signal's timing information in memory during power saving mode. Instead of completely deactivating and resetting the clock signal, the system preserves the timing information and quickly restores it when exiting power saving mode, significantly reducing the re-acquisition time while still achieving power savings.
4Device complexity
If multiple subsystems share one oscillator, then chip cost and area are reduced, but frequency precision deteriorates when temperature varies
Solution Approach 1:
The patent applies segmentation by separating the oscillator functions into two distinct components: a single shared conventional crystal oscillator for generating base clock signals, and individual compensation mechanisms for each subsystem. This allows multiple subsystems to share the low-cost oscillator while each subsystem receives temperature-compensated frequency information, maintaining precision without requiring separate temperature-compensated oscillators for each subsystem.
Data Source
AI summary
A clock system includes a clock signal generating circuit and a controlling circuit. The clock signal generating circuit is used for generating a primary clock signal and a reference clock signal both derived from an oscillating signal of the clock signal generating circuit. The controlling circuit is coupled to the clock signal generating circuit and used for receiving the primary clock signal under a normal mode and compensating timing information generated from the primary clock signal according to the reference clock signal when the clock system exits a power saving mode. The primary clock signal is de-activated when the clock system enters the power saving mode and is activated when the clock system exits the power saving mode. The clock system can keep a continue clock for system to use when the primary clock signal is gated or power saving mode is entered.