Clock Transfer Circuit for Dynamic Column Clock Control

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Solution Overview

Problem

Conventional semiconductor devices consume excessive power and operation current due to the continuous supply of column clock during periods when column operations are not being performed, leading to increased power consumption.

Innovation Solution

A clock transfer circuit that controls the supply of external clock as a column clock only during active operations and blocks its transfer during precharge operations, using a clock control unit to manage the clock transfer unit and reduce unnecessary operation current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the column clock is continuously supplied to the column operation circuit, then the circuit can operate whenever needed, but the operation current and power consumption increase during periods when column operations are not performed

Engineering Contradiction:
Improvecircuit operabilityVSAvoidoperation current
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies periodic action by enabling the column clock only during specific periods when column operations are required (between active command and precharge command) and disabling it during other periods. This is achieved through a clock control circuit that generates enable signals based on command detection, allowing the clock to be supplied periodically rather than continuously, thus reducing power consumption while maintaining circuit operability when needed

Inventive Principle:
Principle #19Periodic action

2Ease of operation

If the column clock is continuously supplied to the column operation circuit, then the circuit is always ready for operation, but the power consumption of the semiconductor device increases

Engineering Contradiction:
Improvecircuit readinessVSAvoidpower consumption
Core Design Contradiction:
Ease of operationVSUse of energy by stationary object

Solution Approach 1:

The patent implements periodic action by controlling the clock supply to be periodic rather than continuous. The clock control circuit detects commands and generates enable signals that activate the clock only during necessary operation periods, ensuring the circuit is ready when needed while avoiding continuous power consumption during idle periods

Inventive Principle:
Principle #19Periodic action

3Device complexity

If the clock transfer unit supplies the same internal clock to both row and column operation circuits, then the circuit structure is simple, but the column operation circuit cannot reduce operation current during non-column operation periods

Engineering Contradiction:
Improveclock distribution structureVSAvoidoperation current
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The patent applies segmentation by dividing the clock distribution into separate paths for row and column operation circuits. Instead of supplying the same internal clock to both circuits, the patent creates distinct clock supply paths with independent control, allowing the column clock to be selectively enabled or disabled based on operation requirements, thus enabling current reduction without significantly increasing overall system complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamics by making the clock supply configuration adaptable and changeable based on operation mode. The clock control circuit dynamically adjusts whether to supply clock signals to the column operation circuit based on detected commands, transforming a static clock distribution system into a dynamic one that can optimize power consumption according to real-time operational needs

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8767503B2Clock transfer circuit and semiconductor device including the same
Publication Date: 2014.07.01 SK HYNIX INC
  • US8767503B2 patent drawing
  • US8767503B2 patent drawing
  • US8767503B2 patent drawing

AI summary

A clock transfer circuit includes a clock transfer unit configured to receive an external clock and transfer the received external clock as one or more internal clocks and a clock control unit configured to control the clock transfer unit to transfer the external clock as a column clock among the internal clocks in response to an active command and block a transfer of the external clock as the column clock in response to a precharge command.