Dual Feedback Clock and Voltage Regulation for Timing Error Control
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Solution Overview
Problem
Synchronous digital systems face timing errors due to supply voltage drifts, which are often mitigated by adding a guardband, leading to inefficient operation, as the clock signal frequency remains unaffected and can cause the digital load to require more time for computations.
Innovation Solution
A control circuit comprising an oscillator that provides a clock signal with an oscillation period dependent on the supply voltage and greater than the critical path delay, along with a control module that adjusts the supply voltage based on voltage and phase differences between the supply voltage and reference clock, allowing the oscillator to change the oscillation period to reduce phase differences between the clock signal and reference clock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a built-in margin or guardband is added for supply voltage to prevent timing errors, then timing error prevention is improved, but operation efficiency of the digital load deteriorates
Solution Approach 1:
The patent implements a feedback mechanism where the clock signal from the oscillator is fed back to a phase detector that compares its phase with a reference clock signal. The phase detector output controls the oscillator's oscillation period, creating a closed-loop system that automatically adjusts the clock frequency to track supply voltage variations, eliminating the need for conservative guardbands while maintaining timing accuracy
Solution Approach 2:
The oscillator's oscillation period is made dynamic rather than fixed, allowing it to automatically adjust in response to supply voltage changes. This dynamic adaptation enables the system to operate efficiently at higher clock frequencies when voltage is stable while preventing timing errors when voltage sags, replacing the static guardband approach with a responsive dynamic system
2Productivity
If the oscillation period is decreased to increase clock frequency, then productivity is improved, but timing errors occur when supply voltage decreases
Solution Approach 1:
The phase detector continuously monitors the phase relationship between the oscillator output and reference clock, providing feedback that automatically adjusts the oscillation period. This feedback loop allows the system to operate at high frequencies when conditions permit while automatically reducing frequency when supply voltage drops, preventing timing errors without sacrificing overall productivity
Solution Approach 2:
The oscillation period parameter is made variable rather than fixed, allowing the system to optimize clock frequency based on real-time supply voltage conditions. The control module dynamically adjusts this parameter to maintain the relationship where the oscillation period remains greater than the critical path delay, ensuring timing accuracy while maximizing productivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively prevents timing errors by ensuring the clock signal tracks the supply voltage non-idealities and maintains phase lock with the reference clock, avoiding inefficiencies associated with guardbands and ensuring stable operation across varying conditions.
Implementation Method 1
an oscillator configured to provide, to a digital load, a clock signal having an oscillation period that (i) depends on a supply voltage
Data Source
AI summary
A control circuit includes an oscillator configured to provide, to a digital load, a clock signal having an oscillation period that (i) depends on a supply voltage and (ii) is greater than a critical path delay of the digital load. The control circuit also includes a control module configured to provide the supply voltage to the digital load and the oscillator and adjust the supply voltage based on (i) a degree of a voltage difference between the supply voltage and a reference voltage and (ii) a degree of a phase difference between the clock signal and a reference clock such that the oscillator changes the oscillation period to reduce the degree of the phase difference between the clock signal and the reference clock.