Clock and Voltage Generation Circuit for Leakage Reduction

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Solution Overview

Problem

Display quality is compromised due to leakage currents in transistors used in organic light-emitting display devices, particularly when using low-temperature polycrystalline silicon (LTPS) and oxide semiconductor transistors, leading to fluctuations in current through organic light-emitting diodes.

Innovation Solution

A clock and voltage generation circuit that generates specific gate high and low voltages, with level shifters synchronizing gate clock signals and a pulse modulation circuit that lowers the second gate high voltage in response to a kickback signal, minimizing the influence of coupling capacitance and reducing leakage currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If LTPS transistors are used in circuit units, then high mobility and element stability are achieved, but leakage current occurs when voltage level is lowered or operating frequency is lowered

Engineering Contradiction:
ImprovemobilityVSAvoidleakage current
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent changes the material parameter of the semiconductor layer from LTPS to oxide semiconductor, which fundamentally alters the electrical characteristics to achieve lower leakage current while maintaining acceptable mobility for the application

Inventive Principle:
Principle #35Parameter changes

2Object-generated harmful factors

If oxide semiconductor transistors are used, then leakage current is reduced, but manufacturing complexity increases due to combining multiple transistor types

Engineering Contradiction:
Improveleakage currentVSAvoidcircuit unit structure
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent applies local quality by using different semiconductor materials (LTPS and oxide semiconductor) in different transistor positions within the same circuit unit, optimizing each transistor's characteristics for its specific function while managing the overall complexity

Inventive Principle:
Principle #3Local quality

3Device complexity

If kickback voltage is not compensated, then circuit operation is simpler, but display quality deteriorates due to current fluctuations

Engineering Contradiction:
Improvecircuit operationVSAvoiddisplay quality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements feedback by detecting the kickback voltage generated during transistor switching and applying a compensating voltage to counteract its harmful effects, thereby stabilizing the current through the organic light-emitting diode and maintaining display quality

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11538415B2Clock and voltage generation circuit and display device including the same
Publication Date: 2022.12.27 SAMSUNG DISPLAY CO LTD
  • US11538415B2 patent drawing
  • US11538415B2 patent drawing
  • US11538415B2 patent drawing

AI summary

A clock and voltage generation circuit includes a voltage generator which generates a first gate high voltage, a first gate low voltage, a second gate high voltage, and a second gate low voltage, a first level shifter which generates a first gate clock signal which swings between the first gate high voltage and the first gate low voltage in synchronization with a gate pulse signal, and a second level shifter which generates a second gate clock signal which swings between the second gate high voltage and the second gate low voltage in synchronization with the gate pulse signal. The voltage generator lowers the second gate high voltage to a voltage level of a kickback reference voltage in response to a kickback signal, and the first gate low voltage and the second gate high voltage are gate-on voltages, and the first gate high voltage and the second gate low voltage are gate-off voltages.