Clocked Isolation Circuit for Low-Kickback Noise Comparators
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing comparators suffer from performance degradation due to kickback noise caused by transient voltage changes during state transitions, which is not effectively mitigated by additional capacitors that can slow down the comparator's speed and introduce errors.
Innovation Solution
Incorporating an isolation circuit between the input pair circuit and the latch circuit, which is selectively turned on and off based on a clock signal to reduce coupling and thereby minimize the impact of kickback noise during reset and comparison states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If additional capacitor(s) are employed to reduce kickback noise, then the kickback noise is reduced, but the speed of the comparator is slowed down
Solution Approach 1:
The comparator is segmented into distinct functional blocks (input pair circuit, isolation circuit, latch circuit) that can be independently controlled. The isolation circuit acts as a separable element that can be selectively activated to block noise transmission without affecting the overall comparator speed when not in use.
Solution Approach 2:
An isolation circuit is introduced as an intermediary element between the input pair circuit and the latch circuit. This intermediary circuit selectively blocks the transmission of kickback noise from the latch circuit to the input pair circuit during reset operations, while allowing normal signal transmission during comparison operations.
2Object-affected harmful factors
If additional capacitor(s) are employed to reduce kickback noise, then the kickback noise is reduced, but errors are present between the capacitance value of the additional capacitor(s) and the capacitance value of the parasitic capacitor(s)
Solution Approach 1:
The isolation circuit serves as a mediator that blocks noise transmission paths without requiring precise capacitance matching. By using switching elements to physically isolate circuits during critical operations, the design eliminates the need for precise capacitance value matching between additional and parasitic capacitors.
Solution Approach 2:
The isolation circuit employs dynamic switching elements that change their state (conducting or blocking) based on the operational phase of the comparator. This dynamic control allows the system to adaptively manage noise isolation without requiring fixed, precisely matched capacitance values.
Data Source
AI summary
A comparator includes an input pair circuit, an isolation circuit, and a latch circuit. The input pair circuit receives first and second input signals to generate first and second signals. The isolation circuit is selectively turned on according to a clock signal to transmit the first signal from the input pair circuit to a first output node and transmit the second signal from the input pair circuit to a second output node. The latch circuit adjusts a level of the first output node to generate a first output signal, adjusts a level of the second output node to generate a second output signal, and selectively resets the levels of the first and the second output nodes according to the clock signal. When the latch circuit resets the levels of the first and the second output nodes, the isolation circuit is not turned on.