Clocked Memory Sub-Rate Calibration via Full-Rate State Calculation
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Solution Overview
Problem
Existing calibrated memory systems require time-consuming recalibration operations when reducing clock frequencies, which negatively impacts performance and makes it less attractive to decrease clock frequencies for short periods.
Innovation Solution
A clocked memory system that performs calibration at full-rate frequency to determine a full-rate calibration state, which is then used to calculate sub-rate calibration states, eliminating the need for additional recalibration during sub-rate operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If recalibration operation is performed when reducing clock frequency, then timing margin is improved, but time consumption increases
Solution Approach 1:
The system performs calibration at full-rate frequency in advance to obtain a full-rate calibration state. This preliminary calibration result is then used to calculate sub-rate calibration states when frequency reduction is needed, eliminating the need for time-consuming recalibration operations at lower frequencies while ensuring proper timing margins are maintained.
Solution Approach 2:
The invention changes the calibration approach by performing calibration at a different parameter state (full-rate frequency) and then transforming that calibration data to适用于 sub-rate frequencies. The full-rate calibration state is mathematically transformed to generate appropriate sub-rate calibration states, allowing the system to adapt to frequency changes without re-calibration.
2Use of energy by moving object
If clock frequency is reduced for power savings, then power consumption decreases, but system performance deteriorates due to recalibration requirements
Solution Approach 1:
By performing calibration at full-rate frequency in advance and storing the calibration state, the system prepares calibration data that can be quickly transformed for sub-rate operation. This eliminates performance-deteriorating recalibration delays when frequency reduction is needed for power savings, allowing seamless transition between power-saving and performance modes.
Solution Approach 2:
The full-rate calibration state serves multiple functions: it directly provides timing parameters for full-rate operation and serves as the basis for calculating sub-rate calibration states. This multi-functional use of a single calibration operation enables the system to operate efficiently at both full-rate and sub-rate frequencies without requiring separate calibration procedures.
Data Source
AI summary
The disclosed embodiments related to a clocked memory system which performs a calibration operation at a full-rate frequency to determine a full-rate calibration state that specifies a delay between a clock signal and a corresponding data signal in the clocked memory system. Next, the clocked memory system uses the full-rate calibration state to calculate a sub-rate calibration state, which is associated with a sub-rate frequency (e.g., ½, ¼ or ⅛ of the full-rate frequency). The system then uses this sub-rate calibration state when the clocked memory system is operating at the sub-rate frequency. This calculation of the sub-rate state calibration states eliminates the need to perform an additional time-consuming calibration operation for each sub-rate.