Clocked Miller Capacitor Reset in Differential Amplifiers
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Solution Overview
Problem
The existing reset mechanisms for amplifiers, particularly in analog-to-digital converters, are insufficient in completely removing residual charges, leading to inaccurate or nonlinear output signals due to the presence of Miller capacitors, which affects the bandwidth and stability of the amplifier.
Innovation Solution
The amplifier incorporates a compensation circuit with multiple capacitors that alternately operate as Miller capacitors according to clock signals, allowing for the reconfiguration of connections between the Miller capacitors and output terminals to recycle residual charges and reset the voltage levels to a common mode, thereby enhancing the linearity and accuracy of output signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a Miller capacitor is coupled to the output terminal to configure bandwidth and stability, then the amplifier achieves proper bandwidth and stability, but residual charges remain on the capacitor from previous operations causing inaccurate or nonlinear output signals
Solution Approach 1:
The single Miller capacitor is segmented into multiple capacitors (first Miller capacitor and second Miller capacitor) that can be independently controlled. This segmentation allows selective connection to different output terminals based on operational phase, enabling residual charge management while maintaining bandwidth and stability configuration.
Solution Approach 2:
The Miller capacitors are dynamically connected and disconnected from output terminals using switches controlled by clock signals. This dynamic reconfiguration allows the capacitors to be connected during amplification phases for stability and disconnected during reset phases to eliminate residual charges, resolving the contradiction between maintaining reliability and ensuring measurement precision.
2Measurement precision
If the amplifier is reset before amplifying signals to remove residual charges, then output signal accuracy improves, but the present reset mechanism is not sufficient to remove residual charges completely with increment in operating speed
Solution Approach 1:
The reset operation is performed periodically through clocked switch control, where the first and second Miller capacitors are alternately connected and disconnected. This periodic action ensures that residual charges are systematically removed at appropriate intervals without compromising the high operating speed of the amplifier, maintaining both measurement precision and productivity.
3Measurement precision
If multiple capacitors are used to alternately operate as Miller capacitors, then residual charges can be removed and linearity improved, but the device complexity increases
Solution Approach 1:
The first and second Miller capacitors serve multiple functions: they act as compensation capacitors during amplification phases to maintain stability and bandwidth, and they function as reset elements during reset phases by being selectively disconnected to remove residual charges. This multi-functionality improves linearity and accuracy without proportionally increasing device complexity.
Solution Approach 2:
The compensation and reset functions are merged into a single integrated circuit structure where the same capacitors and switches perform both amplification support and residual charge removal. This merging approach achieves improved measurement precision while minimizing the increase in device complexity by avoiding separate dedicated components for each function.
Data Source
AI summary
An amplifier includes an output stage circuit and a compensation circuit. The output stage circuit includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The compensation circuit includes a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor. The first capacitor is coupled between the first input terminal and the second output terminal, and is configured to operate as a first Miller capacitor. The second capacitor is coupled between the second input terminal and the first output terminal, and is configured to operate as a second Miller capacitor. The third capacitor and the fourth capacitor are configured to alternately operate as the first Miller capacitor and the second Miller capacitor according to at least one clock signal.