Clockless Delay Adaptation Loop for ISI-Resilient Random Data

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Solution Overview

Problem

Current data transmission systems face challenges in maintaining signal integrity due to factors like bandwidth limitations and inter-symbol interference (ISI), especially at high data rates, which limit transmission distances and require complex equalization techniques.

Innovation Solution

A clockless decision-feedback equalizer (DFE) with a delay adaptation loop using voltage-controlled delay lines (VCDLs) and autocorrelators to adapt delays to 0.5 UI, allowing for cascaded delays to achieve 1 UI, thereby reducing ISI and improving signal integrity without the need for a clock.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If equalization techniques are used to compensate for ISI, then signal integrity is improved, but device complexity increases

Engineering Contradiction:
Improvesignal integrityVSAvoidequalization circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The delay adaptation loop automatically adjusts the delay line settings using autocorrelation detection to find the optimal delay value, eliminating the need for manual calibration or complex external control circuits. The system self-adjusts to maintain optimal equalization performance across varying data rates and channel conditions.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent implements dynamically adjustable delay lines that can adapt their delay values in real-time based on the detected signal characteristics. This dynamic adaptation allows the equalization circuit to optimize performance for different data rates and channel conditions without requiring multiple fixed delay configurations.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If delay adaptation is implemented for different data rates, then adaptability is improved, but device complexity increases

Engineering Contradiction:
Improvedelay adaptation for different data ratesVSAvoiddelay adaptation circuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The autocorrelation-based delay adaptation mechanism serves multiple functions: it detects the optimal delay value, determines data rate characteristics, and controls the delay line adjustment all through a single unified circuit architecture. This universal approach eliminates the need for separate adaptation circuits for each data rate.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the operating parameters of the delay line based on detected signal characteristics, adjusting delay values dynamically to match different data rates. The autocorrelation function detects optimal delay parameters, and these parameters are then applied to configure the delay line for the current operating conditions.

Inventive Principle:
Principle #35Parameter changes

3Ease of operation

If voltage-controlled delay lines are used for clockless operation, then ease of operation is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveclockless delay controlVSAvoiddelay line calibration precision
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The delay line system performs self-calibration by using the autocorrelation function to automatically detect the optimal delay value corresponding to 1 UI. This self-adjusting mechanism eliminates the need for precise factory calibration or manual adjustment, making the system easier to manufacture while maintaining high precision.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11239834B2Clockless delay adaptation loop for random data
Publication Date: 2022.02.01 TEXAS INSTRUMENTS INC
  • US11239834B2 patent drawing
  • US11239834B2 patent drawing
  • US11239834B2 patent drawing

AI summary

An apparatus includes a clockless delay adaptation loop configured to adapt to random data. The apparatus also includes a circuit coupled to the clockless delay adaptation loop. The clockless delay adaptation loop includes a cascaded delay line and an autocorrelation control circuit coupled to the cascaded delay line, wherein an output of the autocorrelation control circuit is used to generate a control signal for the cascaded delay line.