Clockless Time Interval Digital Conversion via Charge Redistribution

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Solution Overview

Problem

Existing clockless conversion methods for time intervals to digital words in monitoring and control systems face inefficiencies due to the need for breaks between conversions and high energy consumption, as well as limitations in reducing the area occupied by converters and increasing the time of charge redistribution.

Innovation Solution

The method involves detecting the beginning and end of time intervals using a control module to map electric charge proportionally, accumulating it in a sampling capacitor, and redistributing it across an array of capacitors with progressively doubling capacitance values, allowing for continuous conversion of successive time intervals without breaks, using a single apparatus and reducing energy consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If breaks are introduced between conversions to allow charge redistribution, then conversion accuracy is maintained, but conversion speed and productivity decrease

Engineering Contradiction:
Improveconversion accuracyVSAvoidconversion speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent divides the charge redistribution process into two independent parallel paths: one path handles charge redistribution while another path simultaneously performs charge accumulation for the next conversion cycle. This segmentation allows continuous operation without breaks, resolving the contradiction between maintaining accuracy and improving conversion speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary charge accumulation in a second sampling capacitor during the time the first capacitor is undergoing redistribution. By preparing the next charge value in advance while the current conversion completes, the system eliminates idle time between conversions, maintaining both accuracy and high productivity.

Inventive Principle:
Principle #10Preliminary action

2Area of stationary object

If a single sampling capacitor is used for charge accumulation, then device area is reduced, but conversion continuity is compromised due to required breaks for redistribution

Engineering Contradiction:
Improveconverter areaVSAvoidconversion continuity
Core Design Contradiction:
Area of stationary objectVSProductivity

Solution Approach 1:

The patent segments the charge accumulation function across two separate sampling capacitors (first and second sampling capacitors), allowing one to be used while the other undergoes redistribution. This enables continuous conversion operations without requiring a single large capacitor, maintaining compact area while ensuring productivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent ensures continuous useful action by overlapping the charge accumulation phase of one capacitor with the redistribution phase of another. This continuous operation eliminates idle time between conversions, achieving both compact area and high productivity.

Inventive Principle:
Principle #20Continuity of useful action

3Device complexity

If charge accumulation and redistribution are performed sequentially in a single capacitor, then device complexity is reduced, but energy consumption increases due to repeated charging from zero

Engineering Contradiction:
Improvesystem complexityVSAvoidenergy consumption
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The patent segments the conversion system into two parallel operational paths with separate capacitors, allowing one capacitor to accumulate charge while another redistributes. This enables continuous operation where charge is always available, eliminating the energy-wasting repeated charging cycles and reducing overall energy consumption while maintaining manageable system complexity.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables minimal delay in conversion results, reduces energy consumption, and decreases the area required for the converter, achieving a significant reduction in the time of charge redistribution by at least 25% while maintaining high resolution and accuracy.

Implementation Method 1

A given portion of charge is delivered by the use of the current source during the converted time interval and is accumulated in the sampling capacitor

Methodology Applied
Scientific EffectCharge accumulation: Capacitance

Implementation Method 2

the accumulated electric charge is submitted to the process of redistribution by deploying the charge in the array of capacitors while a capacitance value of each capacitor of a given index is twice as high as a capacitance value of a capacitor of the previous index

Methodology Applied
Scientific EffectCharge transfer: Capacitance

Data Source

PatentEP2624077B1Method and apparatus for clockless conversion of time interval to digital word
Publication Date: 2020.03.11 ACAD GORNICZO HUTNICZA IM STANISLAWA STASZICA
  • EP2624077B1 patent drawingFigure 1
  • EP2624077B1 patent drawingFigure 2
  • EP2624077B1 patent drawingFigure 3

AI summary

Method consists in a detection of the beginning and of the end of a time interval by means of the control module and in mapping this time interval to a portion of electric charge proportional to this time interval and accumulated in the sampling capacitor (Cn) and then consists in realization of the process of charge redistribution in the array of redistribution (A) by changing states of signals from relevant control outputs and in assignment of relevant values to bits in the digital word by means of the control module (CM). Method is characterized in that after detection of the beginning of the next time interval (Tx+1), the charge is accumulated in the additional sampling capacitor (CnA) and then the process of charge redistribution is realized and relevant values are assigned to bits of the digital word. When the beginning of the subsequent time interval (Tx+2) is detected, the next cycle begins and electric charge is accumulated in the sampling capacitor (Cn) again. Apparatus comprises the array of redistribution (A), the section of the sampling capacitor (An), the control module (CM), two comparators (K1 and K2) and two current sources (I, J) connected in a known way. Apparatus is characterized in that the additional sampling capacitor (CnA) and top plate change-over switches (STn, STnA, SBn, SBnA) are connected in the section of the sampling capacitor (An). Furthermore, the additional capacitor (Cn-1A) having the highest capacitance value in the array of redistribution and the bottom plate change-over switches (STn-1, STn-1A, SBn-1, SBn-1A) are connected to the capacitor (Cn-1) having the highest capacitance value in the array of redistribution in a similar way as to the sampling capacitor (Cn).