Hardware Clos Network Controller for High-Speed Lane Reordering
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Solution Overview
Problem
Current software-based Clos network controllers are slow and unfeasible for dynamically configuring multiplexers and crossbars in large Clos networks, particularly in hardware implementations, which is a challenge in reordering virtual lanes in high-speed Ethernet networks like 100GE and 40GE.
Innovation Solution
A hardware-based Clos network controller using a state-machine and specific data structures, such as availability vectors and backtracking algorithms, is implemented to efficiently configure crossbars and multiplexers, enabling fast and practical lane reordering in large Clos networks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If software-based Clos network controllers are used, then ease of implementation is improved, but speed and latency worsen making them unfeasible for high-speed Ethernet networks
Solution Approach 1:
The patent replaces software-based control with a hardware-based Clos network controller implemented in Field-Programmable Gate Array (FPGA) technology. This substitution of mechanical/software systems with hardware/electronic systems directly addresses the speed limitation while maintaining implementability through programmable logic devices.
Solution Approach 2:
The patent changes the operational parameters of the controller by implementing dedicated hardware circuits with parallel processing capabilities, state-machine logic, and optimized data path widths. These parameter changes in the hardware domain enable the controller to operate at high speeds suitable for 100 Gigabit Ethernet networks.
2Speed
If hardware-based Clos network controllers are used, then speed is improved, but device complexity increases
Solution Approach 1:
The patent segments the Clos network controller into distinct functional modules including ingress crossbar control, egress crossbar control, state-machine logic, and data structure management. This segmentation allows each module to be independently optimized and managed, reducing overall complexity while maintaining high-speed operation.
Solution Approach 2:
The patent introduces optimized data structures such as availability vectors and backtracking vectors as intermediaries between control logic and crossbar configurations. These intermediary structures simplify the control algorithm complexity by providing efficient representations of network state and routing decisions.
3Ease of operation
If traditional crossbar configurations are used, then ease of operation is improved, but latency increases making them unfeasible for high-speed networks
Solution Approach 1:
The patent implements preliminary action by pre-calculating and pre-configuring crossbar routing paths using availability vectors that track the state of all crossbars in advance. This allows the controller to rapidly determine optimal paths without iterative searching during actual data transmission, reducing latency while maintaining operational simplicity.
Solution Approach 2:
The patent implements backtracking algorithms that can skip through multiple routing options rapidly, rushing through the configuration process by evaluating and rejecting suboptimal paths quickly to reach the optimal configuration faster than traditional methods.
Data Source
AI summary
Many network protocols, including certain Ethernet protocols, include specifications for multiplexing using of virtual lanes. Due to skews and/or other uncertainties associated with the process, packets from virtual lanes may arrive at the receiver out of order. The present disclosure discusses implementations of receivers that may use multiplexer based crossbars, such as Clos networks, to reorder the lanes. State-based controllers for the Clos networks and state-based methods to assign routes in are also discussed.