Close-Pitch Interconnect Fabrication Without Dielectric Flop-Over
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Solution Overview
Problem
In semiconductor device fabrication, the mechanical weakness of dielectric spacers between metal lines leads to dielectric 'flop over' issues, causing variations in metal interconnect thickness and electrical performance due to induced stresses and reduced stiffness, especially at tighter pitches.
Innovation Solution
A sequential process forming two sets of interleaved metal lines, with thicker dielectric spacers in the first formation and filled trenches in the second, avoiding empty trenches that deform during conductive material fill, using techniques like self-alignment double patterning and Litho-Etch-Litho-Etch processes with specific conductive materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If thinner dielectric spacers are used to achieve closer metal line spacing, then device density increases, but dielectric mechanical strength decreases causing flop over
Solution Approach 1:
The patent divides the formation of closely-spaced metal interconnects into two sequential stages: first forming alternating metal lines with sufficient spacing to prevent dielectric flop-over, then removing mandrels and forming additional metal lines in the previously occupied spaces. This segmentation allows achieving tight final pitch while maintaining dielectric strength during fabrication.
Solution Approach 2:
The patent performs preliminary actions by first forming the first set of metal interconnects with adequate spacing between them, ensuring dielectric spacers have sufficient mechanical strength during this stage. The mandrels are then removed and second set of interconnects are formed in the spaces previously occupied by mandrels, achieving the final tight pitch only after the vulnerable dielectric structures have been established.
2Productivity
If closer spacing of metal lines is implemented to increase device density, then area utilization improves, but dielectric flop over occurs causing manufacturing defects
Solution Approach 1:
The fabrication process is segmented into two distinct phases: Phase 1 forms metal interconnects with relaxed pitch requirements where dielectric spacers maintain adequate mechanical strength, and Phase 2 fills the previously mandrel-occupied spaces with additional metal interconnects. This segmentation enables achieving high device density while maintaining manufacturing reliability.
Solution Approach 2:
The patent implements preliminary formation of the first set of metal interconnects with sufficient spacing to ensure dielectric integrity during fabrication. Only after this reliable structure is established are the mandrels removed and the second set of interconnects formed, thereby achieving high density without compromising manufacturing yield.
3Reliability
If sequential formation of two sets of interconnects is used to prevent dielectric flop over, then manufacturing reliability improves, but process complexity increases
Solution Approach 1:
The patent merges the formation of both sets of metal interconnects into a single integrated fabrication sequence using self-aligned double patterning or litho-etch-litho-etch processes. The mandrels serve dual purposes as both structural templates for first-set interconnect formation and as spacing definitions for second-set interconnect locations, thereby reducing overall process complexity despite the two-stage interconnect formation.
Solution Approach 2:
The mandrels automatically define the precise locations for both the first set of metal interconnects (formed between mandrels) and the second set of metal interconnects (formed where mandrels are subsequently removed). This self-alignment mechanism eliminates the need for separate alignment steps and complex lithography processes, maintaining manufacturing reliability while controlling process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures consistent metal line formation at tighter pitches without dielectric flop over, maintaining electrical performance and allowing for closer spacing of metal lines by using dielectric materials with a Young's modulus of 1 GPa or greater.
Implementation Method 1
the ILD sections are made of a dielectric material having a Young's modulus equal to or greater than 1 GPa
Data Source
AI summary
A method of forming interconnects is provided. The method includes forming a plurality of mandrels on an interlayer dielectric (ILD) layer. The method further includes forming sidewall spacers on opposite sides of the each mandrel, wherein a portion of the ILD layer is exposed between adjacent sidewall spacers on adjacent mandrels, and removing the exposed portions of the ILD layer to form a first set of trenches between adjacent sidewall spacers. The method further includes forming a first set of interconnects in the first set of trenches, and removing the mandrels to expose portions of the ILD layer between the sidewall spacers. The method further includes removing the exposed portions of the ILD layer to form a second set of trenches between the sidewall spacers, and forming a second set of interconnects in the second set of trenches.