Semiconductor Package Layout With Closed-Loop Ball Array EMI Shielding
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Solution Overview
Problem
There is a need for semiconductor packages that are smaller in size and provide improved electromagnetic interference (EMI) shielding to meet the demands of higher functionality, higher speed, and smaller electronic devices, while also preventing interference between components.
Innovation Solution
A semiconductor package design featuring a first substrate with a ground pattern and conductive pattern, a semiconductor chip, a ball array structure with a closed loop shape, and a shielding structure that is electrically connected to the ground pattern, which extends along the perimeter of the chip and is in contact with the ball array structure, along with an interposer and connection terminals to facilitate connection with a second substrate and semiconductor chip, effectively blocking electromagnetic waves.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional semiconductor package design is used, then the package can provide basic functionality, but the size is large and EMI shielding is insufficient
Solution Approach 1:
The patent implements a nested structure where the ball array structure with closed-loop ground patterns is integrated within the package substrate, and the semiconductor chip is mounted on top. The shielding structure is further nested by forming conductive patterns directly on the chip surface. This multi-level nesting allows EMI shielding functionality to be embedded within the package volume without requiring additional external shielding components, thus improving EMI shielding while maintaining compact size.
Solution Approach 2:
The patent transitions from traditional planar EMI shielding approaches to a three-dimensional integrated shielding architecture. The closed-loop ground patterns are formed in multiple layers within the substrate, and conductive patterns are added on the chip surface in the vertical dimension. This dimensional expansion allows for more effective EMI shielding within a smaller footprint by utilizing vertical space for shielding structures.
2Reliability
If electromagnetic shielding structures are added to block EMI, then EMI shielding is improved, but the device complexity increases
Solution Approach 1:
The ball array structure serves multiple functions simultaneously: it provides electrical connections (solder balls), establishes ground references (closed-loop ground patterns), and creates EMI shielding (Faraday cage effect). The conductive patterns formed during the chip fabrication process also serve dual purposes as both functional circuit elements and EMI shielding structures. This multi-functionality reduces device complexity by eliminating the need for separate dedicated shielding components.
Solution Approach 2:
The patent implements self-service EMI shielding where the chip's own conductive patterns and interconnect structures are utilized to provide shielding without requiring additional external shielding layers or components. The closed-loop ground patterns on the substrate and conductive patterns on the chip surface automatically create the shielding effect as part of the normal package architecture, making the shielding function inherent to the device structure rather than an added complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves reduced size and enhanced EMI shielding, preventing damage from external electromagnetic waves and ensuring operational reliability by isolating the semiconductor chip and blocking internal electromagnetic waves from radiating out.
Implementation Method 1
a ball array structure that is placed on an upper surface of the first substrate, is electrically connected to the ground pattern, extends along a perimeter of the first semiconductor chip
Implementation Method 2
a shielding structure that is placed on an upper surface of the first semiconductor chip, and is in contact with at least a part of an upper surface of the ball array structure
Data Source
AI summary
A semiconductor package includes a first substrate that includes a first insulating layer, a ground pattern in the first insulating layer, and a first conductive pattern; a first semiconductor chip placed on an upper surface of the first substrate; a ball array structure that is placed on the upper surface of the first substrate along a perimeter of the first semiconductor chip and is electrically connected to the ground pattern; and a shielding structure placed on the upper surface of the first semiconductor chip and in contact with the upper surface of the ball array structure. The ball array structure has a closed loop shape, and includes a solder ball portion and a connecting portion that connects adjacent solder ball portions. A maximum width of the solder ball portion is greater than a width of the connecting portion in a direction perpendicular to an extension direction of the connecting portion.