Closed-Loop Interconnection Line for Semiconductor Electromigration
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Solution Overview
Problem
Electromigration in semiconductor devices leads to void creation in electrode lines, affecting electrical conductivity and necessitates a reduction in this phenomenon to enhance device reliability.
Innovation Solution
A semiconductor device design featuring a closed-loop interconnection line configuration that connects multiple transistors and circuit elements, allowing currents to flow in both directions, thereby reducing the directional force on atoms and minimizing void formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional interconnection line configuration is used, then the device structure is simple, but electromigration causes void creation and reduces electrical conductivity
Solution Approach 1:
The interconnection line is divided into multiple segments forming a closed-loop configuration with multiple path sections between the first and second drain electrodes. This segmentation allows current to flow through different paths, reducing electromigration effects in each individual segment while maintaining overall connectivity.
Solution Approach 2:
The closed-loop interconnection line configuration enables dynamic current distribution where current can flow in multiple directions through different paths. This dynamic characteristic allows the system to adapt to electromigration effects by redistributing current flow, preventing void formation at any single location.
2Reliability
If current flows in a single direction through the interconnection line, then the circuit operation is simple, but electromigration creates voids that reduce reliability
Solution Approach 1:
The current path is segmented into multiple sections within the closed-loop configuration. Each section experiences reduced current density and bidirectional current flow, which mitigates electromigration effects. The segmentation creates multiple current paths that can be actively or passively utilized to maintain electrode integrity.
Solution Approach 2:
Instead of allowing current to flow in a single direction as in conventional designs, the closed-loop configuration enables current to flow in both directions through different paths. This inversion of the conventional unidirectional current flow approach counteracts electromigration forces that would otherwise cause void formation.
3Reliability
If the interconnection line is configured as a closed loop, then electromigration is reduced, but the manufacturing process becomes more complex
Solution Approach 1:
The closed-loop interconnection line configuration serves multiple functions: it provides electrical connectivity, enables bidirectional current flow to reduce electromigration, and can accommodate different circuit layout requirements. This multi-functionality justifies the additional manufacturing complexity by delivering enhanced reliability and design flexibility.
Solution Approach 2:
The invention changes the geometric parameters of the interconnection line from a conventional linear or simple bent configuration to a closed-loop configuration with specific path sections. This parameter change in the interconnection line geometry fundamentally alters the current distribution characteristics and electromigration resistance, accepting increased manufacturing complexity as a trade-off for improved reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The closed-loop interconnection line configuration significantly reduces electromigration-induced void creation, enhancing the semiconductor device's electrical conductivity and reliability.
Implementation Method 1
Electromigration (EM) is a phenomenon in which atoms of an electrode are moved by carriers in, for example, a line. The movement of the atoms of the electrode can create voids in the line, thereby aggravating the electrical conductivity of the line.
Data Source
AI summary
Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device includes a first source electrode configured to connect a first power rail to a first impurity region, the first power rail coupled to a first voltage source, a second source electrode configured to connect a second power rail to a second impurity region, the second power rail coupled to a second voltage source, the first and second voltage sources being different, a gate electrode on the first and second impurity regions, a first drain electrode on the first impurity region, a second drain electrode on the second impurity region and an interconnection line connected to the first drain electrode and the second drain electrode, the interconnection line forming at least one closed loop.