Cluster Memory Erasure Coding for Low-Latency Fault Tolerance
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Solution Overview
Problem
Clustered memory systems face higher latency and lower bandwidth compared to local memory, and are susceptible to failures that can cause computing devices to crash, as they lack redundancy and efficient resource management.
Innovation Solution
Implementing redundancy through replication and erasure coding techniques, such as internal and external erasure coding, to ensure data availability and improve latency and bandwidth constraints, while also using management hosts to monitor and manage memory allocations across a network of memory hosts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is stored in clustered memory servers to improve memory utilization efficiency, then memory capacity is improved, but access latency increases and bandwidth decreases compared to local memory
Solution Approach 1:
The patent segments memory resources by dividing the system into local memory (fast, low-latency) and clustered memory servers (high capacity, remote). The memory management system segments data placement decisions based on access patterns, keeping frequently accessed data in local memory while utilizing remote memory for less frequently accessed data, thus resolving the latency-capacity tradeoff.
Solution Approach 2:
The patent applies local quality by providing different memory characteristics to different computational needs. Local memory provides high-speed access for performance-critical operations, while clustered memory servers provide high-capacity storage for bulk data. The system dynamically assigns data to appropriate memory locations based on access requirements, optimizing both latency and capacity utilization.
2Quantity of substance
If additional memory is installed in memory servers to increase capacity, then memory availability is improved, but the system becomes susceptible to failures that can cause computing devices to crash
Solution Approach 1:
The patent implements beforehand cushioning through redundancy mechanisms in the clustered memory system. Multiple memory servers are configured with redundant data copies and error correction codes. When a memory server fails, the system can retrieve data from redundant copies on other servers, preventing computational crashes and ensuring continuous operation despite hardware failures.
Solution Approach 2:
The patent uses copying by maintaining redundant copies of data across multiple memory servers in the cluster. This replication strategy ensures that if one server fails, data can be recovered from other servers, thereby improving system reliability while maintaining high memory availability.
3Quantity of substance
If memory servers are used to provide high-capacity storage, then memory utilization efficiency is improved, but the complexity of managing memory allocations across the network increases
Solution Approach 1:
The patent applies universality by designing a memory management system that handles multiple functions through a unified interface. The same management infrastructure handles data placement, allocation, failure recovery, and capacity expansion across the clustered memory system. This multi-functional approach reduces operational complexity despite the distributed nature of the system.
Solution Approach 2:
The patent introduces an intermediary memory management layer that sits between computing devices and the distributed memory servers. This intermediary handles the complexity of networked memory management, including allocation decisions, failure handling, and data placement, while presenting a simplified interface to applications. The intermediary abstracts the distributed system complexity from end-users.
Data Source
AI summary
Disclosed are various embodiments for improving the resiliency and performance of clustered memory. A computing device can generate at least one parity page from at least a first local page and a second local page. The computing device can then submit a first write request for the first local page to a first one of a plurality of memory hosts. The computing device can also submit a second write request for the second local page to a second one of the plurality of memory hosts. Additionally, the computing device can submit a third write request for the parity page to a third one of the plurality of memory hosts.


