Cluster Memory Resiliency via Segmentation and RDMA
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Solution Overview
Problem
Clustered memory systems face higher latency and lower bandwidth compared to local memory, and are susceptible to failures that can cause computing devices to crash, as they lack redundancy and efficient failure handling mechanisms.
Innovation Solution
The implementation provides redundancy through replication and erasure coding techniques, improving latency and bandwidth by allowing computing devices to continue operation even in the event of a memory server failure, and optimizing memory allocation and access strategies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is stored in clustered memory servers to improve memory utilization efficiency, then memory capacity is improved, but access latency increases and bandwidth decreases compared to local memory
Solution Approach 1:
The system segments memory resources by dividing clustered memory into multiple chunks and allocating them to different computing devices. Each computing device has local memory for immediate access and can access additional memory chunks from clustered memory servers when needed, creating a hierarchical memory structure that balances capacity and speed.
Solution Approach 2:
The patent introduces RDMA (Remote Direct Memory Access) technology as an intermediary mechanism to enable direct data transfer between computing devices and clustered memory servers without CPU intervention. This intermediary protocol optimizes the access path, reducing latency and improving bandwidth despite the physical distance.
2Quantity of substance
If clustered memory systems are used to provide additional memory resources, then memory efficiency is improved, but system reliability deteriorates due to susceptibility to failures
Solution Approach 1:
The system performs preliminary actions by proactively detecting memory server failures through heartbeat mechanisms and automatically initiating data recovery processes before the failure impacts computing devices. The error correction codes are pre-applied to data chunks, enabling immediate reconstruction without waiting for failure detection.
Solution Approach 2:
The patent implements beforehand cushioning by creating redundant copies of data chunks across multiple memory servers and applying error correction codes. This cushioning layer protects the system against failures, allowing automatic recovery without data loss or computing device crashes.
3Reliability
If redundancy is added through replication and erasure coding to improve resilience, then reliability is improved, but device complexity and overhead increase
Solution Approach 1:
The system uses copying to create redundant data chunks that are distributed across multiple memory servers. Instead of complex active-active redundancy, simple copies are maintained, which can be reconstructed using erasure coding if needed. This approach achieves reliability with minimal complexity overhead.
Solution Approach 2:
The patent applies parameter changes by using erasure coding to transform data into an encoded form that can be reconstructed from fewer than the original number of chunks. This parameter transformation enables efficient storage of redundant information without linearly increasing the number of physical chunks needed.
Data Source
AI summary
Disclosed are various embodiments for improving resiliency and performance of clustered memory. A computing device can acquire a chunk of byte-addressable memory from a cluster memory host. The computing device can then identify an active set of allocated memory pages and an inactive set of allocated memory pages for a process executing on the computing device. Next, the computing device can store the active set of allocated memory pages for the process in the memory of the computing device. Finally, the computing device can store the inactive set of allocated memory pages for the process in the chunk of byte-addressable memory of the cluster memory host.


