Cluster-of-Via Interconnects for Electro-Migration Immunity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional integrated circuit (IC) interconnects suffer from electro-migration (EM) damage, leading to reduced current-carrying capability and reliability issues due to high direct current and self-heating, especially at elevated temperatures, with existing methods failing to effectively protect against EM damage in metal wires and vias.
Innovation Solution
A design structure featuring a plurality of narrow metal wires coated with a conductive liner material, forming a ribbon wire configuration with adjacent wires in contact, and a cluster-of-via structure with refractory metal-filled vias and liner material, which reduces current loading and provides redundancy against EM damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If high direct current is used in conventional metal wires/vias, then current-carrying capability is improved, but electro-migration degradation occurs causing shorts or opens
Solution Approach 1:
The patent divides a single metal wire into multiple parallel metal wires (e.g., three wires instead of one). This segmentation reduces the current density in each individual wire, thereby reducing electro-migration degradation while maintaining the total current-carrying capability. The multiple wires work together to carry the same total current but with lower stress on each wire.
Solution Approach 2:
The patent applies different materials to different parts of the interconnect structure. Specifically, refractory metal (such as tungsten) is used to fill the vias, while copper or aluminum is used for the metal wires. This local material differentiation optimizes each component for its specific function: refractory metal provides mechanical strength and electro-migration resistance in vias, while copper/aluminum provides low resistance in wires.
2Productivity
If current density is increased to meet ever-decreasing dimensions, then productivity is improved, but electro-migration damage increases
Solution Approach 1:
By segmenting the current path into multiple parallel wires, the patent enables high total current density while keeping individual wire current density low. This allows the interconnect structure to meet the high current density requirements of advanced IC technology without suffering from electro-migration damage that would occur in a single wire configuration.
3Power
If self-heating from high current devices is allowed, then power delivery is improved, but temperature rise causes current limit reduction
Solution Approach 1:
The multiple parallel wire configuration distributes the current and associated heat generation across multiple pathways. This segmentation of thermal load helps manage temperature rise more effectively compared to a single wire carrying the same total current, allowing better power delivery without excessive temperature increase.
4Ease of manufacture
If conventional interconnect structures are used, then manufacturing simplicity is maintained, but EM damage protection is insufficient
Solution Approach 1:
The patent extends the existing Damascene process to create multiple parallel metal wire segments. This approach leverages conventional manufacturing techniques while achieving the benefits of segmented current paths. The process involves forming multiple via holes, filling them with refractory metal, and then depositing metal layers to create the parallel wire structure, all using established semiconductor manufacturing methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly enhances the immunity of IC interconnects to electro-migration, extending their lifetime by confining void growth within individual wires and maintaining functionality even with defects, while maintaining conductivity and mechanical reinforcement.
Implementation Method 1
The high current leads to electro-migration (EM) degradation of the interconnect (via and/or line), causing shorts or opens.
Implementation Method 2
The cluster-of-via structure comprises a plurality of vias each of which are filled with a refractory metal and lined with a liner material.
Implementation Method 3
A plurality of metal wires laid out in parallel and each of which are coated with a liner material. Two adjacent of the metal wires are physically contacted to each other.
Data Source
AI summary
An IC interconnect for high direct current (DC) that is substantially immune to electro-migration (EM) damage, and a method of manufacture of the IC interconnect are provided. A structure includes a cluster-of-via structure at an intersection between inter-level wires. The cluster-of-via structure includes a plurality of vias each of which are filled with a metal and lined with a liner material. At least two adjacent of the vias are in contact with one another and the plurality of vias lowers current loading between the inter-level wires.


