Clustered IC Die Reticle Layout for Higher Dies Per Wafer
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Solution Overview
Problem
The existing methods for maximizing the number of integrated circuit (IC) dies per wafer are limited by the need for optical and electrical test structures in scribe lines, which result in unused space and reduced good dies per wafer (GDPW), and alternative approaches like 'structure-free scribe line' or 'steal die' methods are not scalable and compromise across-reticle characterization.
Innovation Solution
A reticle setup with clustered IC die arrangements, where all optical and electrical test structures are placed in wider scribe lines, allowing the same number of IC dies in each cluster with different orientations, minimizing the effective die area and increasing GDPW without sacrificing quality or scalability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If test structures are positioned in scribe lines with consistent width across the wafer, then reliable electrical and optical testing is achieved, but significant unused space remains in scribe lines reducing good dies per wafer
Solution Approach 1:
The patent applies local quality by varying scribe line widths across different locations on the reticle. First scribe lines have a first width suitable for standard spacing, while second scribe lines have a second width specifically designed to accommodate test structures. This localized adaptation allows test structures to be placed only where needed without wasting space in other areas, thereby increasing good dies per wafer while maintaining testing reliability.
2Productivity
If the structure-free scribe line approach is used to increase good dies per wafer, then more IC chip locations are available, but across-reticle characterization becomes inaccurate and the approach is not scalable
Solution Approach 1:
The patent segments the reticle into multiple clusters of IC dies, where each cluster is separated by wider second scribe lines that contain test structures. This segmentation allows test structures to be distributed across multiple locations on the reticle, enabling accurate across-reticle characterization. The clustering approach maintains proper spacing and testing capability while maximizing the number of good dies per wafer.
Data Source
AI summary
A reticle includes a body having a single-use illumination field. The single-use illumination field defines a layer including: a plurality of integrated circuit (IC) die clusters, each of the plurality of IC die clusters including a plurality of IC dies separated by a first scribe line having a first width. The plurality of IC die clusters are arranged in juxtaposition on the body and are separated by a second scribe line having a second width larger than the first width. The IC die clusters each have a same number of IC dies and a same area. There may be a different number of IC dies in an X direction than in a Y direction. The wider scribe lines are configured to include all optical or electrical test structures, and minimize effective die area. A wafer formed using the reticle and a method of forming the reticle are also provided.