CMD Solid-State Imaging Device Overflow Barrier Positioning
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Solution Overview
Problem
The manufacturing process for charge coupled device (CCD) sensors is not suitable for charge modulation devices (CMD), leading to difficulties in accurately setting the relative positions of the gate electrode, overflow barrier, and drain, resulting in a low modulation degree and the need for high reset voltage.
Innovation Solution
A solid-state imaging device with a CMD structure where the overflow barrier is formed in a position not facing the gate electrode, and a sidewall portion is used to define the border between the photoelectric conversion portion and the overflow barrier, allowing for accurate self-alignment and reduced coupling capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the manufacturing process for CCD sensors is directly applied to CMD devices, then the relative positions of impurity diffusion layers can be accurately set through self-alignment, but the positional relationship between the gate electrode, overflow barrier, and drain becomes unsuitable for CMD structure, resulting in low modulation degree and high reset voltage requirements
Solution Approach 1:
A sidewall portion is formed on the gate electrode before forming the overflow barrier and drain. This sidewall portion serves as a preliminary structure that defines the positional relationship between the gate electrode and the subsequent impurity diffusion layers, enabling accurate self-alignment specifically tailored for CMD device geometry and ensuring the overflow barrier does not face the gate electrode
2Ease of manufacture
If the overflow barrier is positioned to face the gate electrode in a planar direction, then the manufacturing process is simplified, but the coupling capacitance between the gate electrode and overflow barrier increases, reducing the modulation degree from the drain to the overflow barrier
Solution Approach 1:
The overflow barrier is deliberately positioned asymmetrically relative to the gate electrode, specifically in a location that does not face the gate electrode in the planar direction. This asymmetric positioning reduces the coupling capacitance between the gate electrode and overflow barrier, thereby increasing the modulation degree from the drain to the overflow barrier and improving device performance
3Reliability
If a high reset voltage is applied to the drain, then the overflow barrier can be eliminated to discharge accumulated electric charge, but the power consumption increases and the device efficiency decreases
Solution Approach 1:
The positional parameter of the overflow barrier is changed from a location facing the gate electrode to a location not facing the gate electrode. This parameter change reduces the coupling capacitance, which in turn reduces the reset voltage required to eliminate the overflow barrier and discharge accumulated charge, thereby lowering power consumption and improving device efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables accurate setting of the relative positions of the impurity diffusion layers, reducing the reset voltage and increasing the modulation degree, thereby improving the efficiency and power consumption of the CMD type solid-state imaging device.
Implementation Method 1
the overflow barrier is eliminated by applying a reset voltage to the drain when the electric charge accumulated in the photoelectric conversion portion of the CMD is reset
Implementation Method 2
a gate electrode is formed on the surface of the semiconductor layer between the source and the drain by interposing an insulation layer
Data Source
AI summary
A solid-state imaging device includes: a gate electrode arranged over an upper surface of a semiconductor substrate; a photoelectric conversion portion formed over the semiconductor substrate to position under the gate electrode; an overflow barrier formed over the semiconductor substrate to position in a portion other than a position facing the gate electrode in a planar direction and adjoin a side face of the photoelectric conversion portion; and a drain formed over the semiconductor substrate to adjoin a side face of the overflow barrier opposite to a side face adjoining the photoelectric conversion portion.