CML-to-CMOS Converter Feed-Forward Circuit for Higher Bandwidth

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Solution Overview

Problem

Conventional CML to CMOS converters experience limited bandwidth and increased power consumption at high frequencies, necessitating a solution that enhances bandwidth while maintaining low power consumption.

Innovation Solution

An improved CML to CMOS converter design incorporating a differential amplifier with input and load transistors coupled in series, along with capacitors providing a feed-forward path between the gates of input and load transistors, which increases high-frequency gain without significant additional current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional CML to CMOS converters are used, then the circuit can perform signal conversion, but the bandwidth is limited and power consumption increases at high frequencies

Engineering Contradiction:
ImprovebandwidthVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The converter is divided into two functional paths: a feed-forward path using capacitors C1 and C2 that directly couples input to output for high-frequency signals, and a conventional amplification path using transistors Q1-Q4 for lower-frequency signals. This segmentation allows high-frequency signals to bypass the power-consuming transistor stages while maintaining conversion functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Capacitors C1 and C2 serve as intermediary elements that create a feed-forward path, allowing high-frequency CML signals to be directly coupled to the CMOS output stage without passing through the power-consuming differential amplifier transistors. This intermediary path enables bandwidth extension while reducing power consumption at high frequencies.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If the converter is designed for high frequency operation, then bandwidth is improved, but power consumption increases

Engineering Contradiction:
Improvehigh-frequency gainVSAvoidcurrent consumption
Core Design Contradiction:
SpeedVSUse of energy by stationary object

Solution Approach 1:

The signal path is segmented into a feed-forward path (capacitors C1, C2) for high-frequency operation and a conventional transistor-based path for lower frequencies. This segmentation enables high-frequency gain without the current consumption penalty of driving transistors at high frequencies.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit utilizes capacitive coupling to change the operating parameters for high-frequency signals, allowing them to pass through with minimal current consumption. The capacitors C1 and C2 are sized to provide low impedance paths at high frequencies while blocking DC and low-frequency signals, thereby changing the effective operating parameters dynamically.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11043948B1Bandwidth enhanced amplifier for high frequency CML to CMOS conversion
Publication Date: 2021.06.22 QUALCOMM INC
  • US11043948B1 patent drawing
  • US11043948B1 patent drawing
  • US11043948B1 patent drawing

AI summary

A bandwidth enhanced amplifier for high frequency CML To CMOS conversion is disclosed. In some implementations, an improved CML to CMOS converter includes a differential amplifier having a first and a second input transistors, and a first and a second load transistors. The first input transistor is coupled in series with the first load transistor, and the second input transistor is coupled in series with the second load transistor. The improved CML to CMOS converter further includes a first capacitor and a second capacitor. The first capacitor is coupled directly between a gate of the first input transistor and a gate of the first load transistor.