Clock-Switched CMOS Amplifier for Low Flicker Noise
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
CMOS amplifiers face challenges in reducing low frequency flicker noise while maintaining miniaturization and high signal-to-noise ratio, as existing methods either increase circuit size or limit operating frequency.
Innovation Solution
A CMOS amplifier design incorporating a switch-bias circuit with two pairs of MOSFETs and clock signals, where one MOSFET functions as a current source during one clock phase and the other during a different phase, effectively reducing low frequency flicker noise by simultaneously processing continuous input signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the active area of devices in the CMOS amplifier is enlarged to reduce low frequency flicker noise, then the noise performance is improved, but parasitic components increase and the operating frequency is limited
Solution Approach 1:
The amplifier is divided into two separate amplifying paths, each with its own MOSFET pair and clock signal control. This segmentation allows independent optimization of each path for noise reduction while maintaining high-frequency operation capabilities, resolving the contradiction between noise performance and operating frequency.
Solution Approach 2:
The invention employs periodic clock signals to alternately activate the two MOSFET pairs. During each clock cycle, one pair is active while the other is inactive, allowing the active pair to be optimized for low-frequency noise reduction with larger device area, while the overall system maintains high-frequency operation through the periodic switching mechanism.
2Object-affected harmful factors
If mixers and low pass filters are added to reduce flicker noise, then the noise performance is improved, but the circuit size is increased
Solution Approach 1:
The invention extracts and eliminates the need for separate low-pass filters by integrating the noise reduction function directly into the amplifying paths through clock-controlled MOSFET pairs. This removes the harmful flicker noise component without requiring additional filter circuits, thereby reducing overall circuit size while maintaining noise performance.
Solution Approach 2:
The clock-controlled MOSFET pairs serve multiple functions: they act as the amplifying element, the noise reduction mechanism, and the signal routing component simultaneously. This multi-functionality eliminates the need for separate mixers and filters, reducing circuit size while achieving flicker noise reduction.
3Object-affected harmful factors
If correlated double sampling method is used to remove l/f noise, then the noise performance is improved, but continuous input signal processing is difficult
Solution Approach 1:
The invention maintains continuous signal processing capability by using two clock phases that alternately activate the two MOSFET pairs. While one pair is active and processing the signal, the other is resetting or preparing, ensuring that the amplification function continues without interruption. This allows continuous input signals to be processed while still achieving l/f noise reduction through the correlated sampling effect.
Solution Approach 2:
The invention dynamically switches between two operating states using clock signals, where each MOSFET pair alternates between active amplification and reset/preparation states. This dynamic operation enables continuous signal processing while implementing the correlated double sampling technique for noise reduction, resolving the contradiction between noise performance and continuous signal handling.
Data Source
AI summary
An apparatus and method of reducing a flicker noise of a CMOS amplifier is provided. In the CMOS amplifier, a load circuit is connected to a signal input circuit which includes two pairs of MOSFETs which simultaneously receive differential signals. In this instance, a first MOSFET included in a switch-bias circuit is connected to one pair of MOSFETs which receive the differential signals and functions as a current source in the case of activation of a clock signal Ø1. A second MOSFET included in the switch-bias circuit is connected to another pair of MOSFETs which receive the differential signals and functions as a current source in the case of activation of a clock signal Ø2.