CMOS Amplifier Slew-Rate Boost Without Settling Error
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Solution Overview
Problem
Amplifier circuits with one-stage CMOS amplifiers face accuracy issues due to offset mismatch between the main amplifier and auxiliary slew rate enhancement circuit, leading to continued auxiliary bias current supply after signal settling, which degrades output signal accuracy.
Innovation Solution
An amplifier circuit configuration with a one-stage CMOS main amplifier and an auxiliary slew rate enhancement circuit, where a controller interrupts the auxiliary bias current at a predetermined timing before signal settling is complete, ensuring the current returns to zero and does not affect the output signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a one-stage CMOS amplifier is used with an auxiliary slew rate enhancement circuit, then power consumption is reduced and high-speed operation is achieved, but offset mismatch between the main amplifier and auxiliary circuit causes auxiliary bias current to continue flowing after signal settling, degrading output signal accuracy
Solution Approach 1:
The controller detects the voltage at the output terminal and determines when settling is complete, then proactively interrupts the auxiliary bias current before it can degrade the output signal accuracy. This preliminary action prevents the accuracy degradation caused by offset mismatch while maintaining the power consumption benefits of the one-stage CMOS amplifier configuration.
2Adaptability or versatility
If transistor characteristics vary in the main amplifier and auxiliary circuit, then offset mismatch occurs, but continuing auxiliary bias current supply after settling degrades output signal accuracy
Solution Approach 1:
The controller continuously monitors the output terminal voltage to detect when settling is complete, using this feedback information to determine the optimal timing for interrupting the auxiliary bias current. This feedback mechanism ensures that the auxiliary current is interrupted at the precise moment when it would otherwise begin to degrade output signal accuracy due to offset mismatch from transistor characteristic variations.
3Speed
If auxiliary bias current is continuously supplied to improve slew rate, then high-speed operation is achieved, but the current affects output signal accuracy after settling is complete
Solution Approach 1:
The auxiliary bias current is supplied periodically during the transient phase to enhance slew rate for high-speed operation, then interrupted when the controller detects that settling is complete. This periodic action pattern allows the system to benefit from high-speed performance when needed while eliminating the harmful effects on output signal accuracy once the signal has settled.
Data Source
AI summary
An amplifier circuit includes a main amplifier and an auxiliary circuit that improves a slew rate of the main amplifier. The main amplifier is composed of a one-stage CMOS amplifier, amplifies a voltage difference between two input signals, and outputs, from output terminals, an output signal corresponding to the voltage difference of the input signals. The auxiliary circuit controls an auxiliary bias current flowing through the output terminals according to the voltage difference of the input signals, and interrupts the auxiliary bias current at a predetermined timing before completion of settling. Such a scheme enables improvement of a slew rate by the auxiliary circuit and high-speed operation as well as reduction of error due to mismatch between the main amplifier and the auxiliary circuit, thereby yielding high-accuracy output signal output therefrom.