Variable Gate Capacitance in CMOS Power Amplifiers for Linearity
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Solution Overview
Problem
CMOS power amplifiers in communication systems face challenges due to non-linearity issues, particularly AM-AM and AM-PM distortion, which limit their efficiency and linearity compared to GaAs power amplifiers, requiring operation in a narrower linear region with reduced efficiency.
Innovation Solution
Incorporating a variable capacitor circuit that adjusts capacitance based on the voltage swing of the gate transistor, mitigating non-linearity by increasing capacitance as output power increases, thereby reducing AM-AM and AM-PM distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If CMOS power amplifier operates in large back-off power region to provide desired linearity, then linearity is improved, but efficiency decreases
Solution Approach 1:
The patent applies dynamics by making the gate capacitance variable rather than fixed. The gate capacitance is adjusted dynamically based on the operating conditions to optimize both linearity and efficiency. Specifically, the gate capacitance is increased in the saturation region and decreased in the triode region, allowing the amplifier to maintain better linearity while improving efficiency across different power levels.
Solution Approach 2:
The patent changes the parameter of gate capacitance to resolve the contradiction. By varying the gate capacitance value according to the operating region (saturation vs. triode), the amplifier can achieve improved linearity without sacrificing efficiency. This parameter change allows the device to adapt its characteristics to different operating conditions, overcoming the fixed trade-off between linearity and efficiency.
2Power
If amplitude of voltage swing approaches knee voltage of transistor device, then output power increases, but gain decreases due to transmission conductance reduction
Solution Approach 1:
The patent applies preliminary action by adjusting the gate capacitance before the amplifier enters the non-linear region. By increasing the gate capacitance in advance when operating in the saturation region, the amplifier is prepared to maintain better gain characteristics as it approaches the knee voltage, thereby preventing the gain reduction that would otherwise occur at higher output powers.
3Adaptability or versatility
If CMOS FET is used instead of GaAs-based transistor, then integration into CMOS IC is enabled, but linear operation region becomes narrower
Solution Approach 1:
The patent applies dynamics by implementing a variable gate capacitance that adapts to the operating conditions of the CMOS FET. This dynamic adjustment compensates for the inherently narrower linear operation region of CMOS FETs compared to GaAs-based transistors, allowing the CMOS amplifier to achieve better linearity while maintaining the integration advantages of CMOS technology.
Solution Approach 2:
The variable gate capacitance acts as an intermediary element that mediates between the CMOS FET's non-linear characteristics and the desired linear performance. By introducing this intermediate component, the patent compensates for the limitations of CMOS FETs and enables the amplifier to achieve linearity comparable to or better than GaAs-based amplifiers while maintaining CMOS integration benefits.
Data Source
AI summary
A power amplifier includes first and second amplification stages. The first amplification stage is configured to amplify a radio frequency (RF) input signal. The second amplification stage includes at least one transistor configured to amplify an output of the first amplification stage, the second amplification stage being configured to have a capacitance between a gate of the at least one transistor and a first power supply voltage. The capacitance automatically varies with amplitude of the output of the first amplification stage.