CMOS Analog Memories Using Ferroelectric Capacitors for Multi-State Storage

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Solution Overview

Problem

Ferroelectric memories face limitations in storing multiple states due to hysteresis issues, where intermediate voltages do not lead to reproducible polarization states, and the number of states is restricted to two, leading to challenges in data storage and retrieval, especially in applications requiring frequent rewriting and erasing.

Innovation Solution

The use of a charge source to program ferroelectric capacitors, allowing for the storage of multiple data states by controlling the charge transferred, independent of the hysteresis loop shape and prior charge state, enabling the storage of more than three distinct states and improving data retrieval efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If intermediate voltages are used to program ferroelectric capacitors, then multiple data states can be stored, but the polarization states are not reproducible due to hysteresis issues

Engineering Contradiction:
Improvenumber of data statesVSAvoidreproducibility of polarization states
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent changes the programming parameter from voltage to charge. By using a charge source to directly program the ferroelectric capacitor, the system overcomes hysteresis issues because charge is a state function that depends only on the initial and final states, not the path taken. This allows reproducible multiple data states to be stored by controlling the amount of charge transferred to the capacitor.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If the number of states per cell is increased to reduce memory cost, then storage density improves, but write time increases significantly

Engineering Contradiction:
Improvenumber of states per cellVSAvoidwrite time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent changes the programming mechanism from voltage-based to charge-based. This allows for faster write times because the charge source can directly transfer the required charge to the capacitor without needing to maintain intermediate voltage states. The charge transfer can be completed in a single step, reducing the write time even as the number of storable states increases.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If more sense amplifiers are added to read/write multiple cells simultaneously, then productivity improves, but device complexity and cost increase

Engineering Contradiction:
Improveread/write throughputVSAvoidnumber of sense amplifiers
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent makes the charge source universal by designing it to program any number of ferroelectric capacitors through a single interface. The charge source can sequentially or simultaneously transfer charge to multiple capacitors without requiring separate sense amplifiers for each cell, thereby maintaining high productivity while reducing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Ease of manufacture

If voltage-based programming is used, then the programming mechanism is simple, but the number of reliably storable states is limited to two

Engineering Contradiction:
Improveprogramming mechanism simplicityVSAvoidnumber of storable states
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent transitions from voltage-based to charge-based programming. While this changes the programming mechanism, it actually simplifies the control logic because charge transfer can be precisely controlled and measured. The charge source can transfer discrete amounts of charge corresponding to different data states, enabling reliable storage of more than two states while maintaining a relatively simple programming interface.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the storage of multiple data states in ferroelectric capacitors, enhancing data storage efficiency and reducing the limitations imposed by hysteresis, enabling more reliable and efficient data management in memory applications.

Implementation Method 1

a ferroelectric capacitor, a charge source and a read circuit. The charge source receives a data value to be stored in the ferroelectric capacitor

Methodology Applied
Scientific EffectFerroelectric effect:

Implementation Method 2

The charge source converts the data value to a remanent charge to be stored in the ferroelectric capacitor and causes that remanent charge to be stored in the ferroelectric capacitor

Methodology Applied
Scientific EffectCharge transfer:

Implementation Method 3

The read circuit determines a charge stored in the ferroelectric capacitor

Methodology Applied
Scientific EffectCapacitance measurement: Capacitance

Data Source

PatentUS10020042B2CMOS analog memories utilizing ferroelectric capacitors
Publication Date: 2018.07.10 RADIANT TECH INC
  • US10020042B2 patent drawing
  • US10020042B2 patent drawing
  • US10020042B2 patent drawing

AI summary

A memory cell and memories constructed from that memory cell are disclosed. A memory according to the present invention includes a ferroelectric capacitor, a charge source and a read circuit. The charge source receives a data value to be stored in the ferroelectric capacitor. The charge source converts the data value to a remanent charge to be stored in the ferroelectric capacitor and causes that remanent charge to be stored in the ferroelectric capacitor. The read circuit determines a charge stored in the ferroelectric capacitor. The data value has more than three distinct possible states, and the determined charge has more than three determined values. The memory also includes a reset circuit that causes the ferroelectric capacitor to enter a predetermined known reference state of polarization.