Self-Aligned CMOS Backside Contacts With Sigma Dielectric Isolation
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Solution Overview
Problem
The fabrication of backside contacts in CMOS semiconductor devices is challenging due to difficulties in aligning contacts with source/drain structures and the risk of damaging substrate surfaces during interlayer dielectric replacement, which can lead to exposure and damage of transistor structures.
Innovation Solution
The implementation of self-aligned backside contacts in CMOS apparatuses, where a sigma-profiled dielectric structure insulates the backside contact from the semiconductor substrate, allowing for the formation of backside source/drain contacts without removing the entire substrate, and using epitaxial growth to create source/drain structures and sacrificial placeholders.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If backside contacts are formed by replacing the interlayer dielectric for the entirety of the semiconductor substrate, then backside source/drain contacts can be accessed, but the substrate surfaces are exposed and damaged, risking damage to transistor structures
Solution Approach 1:
The interlayer dielectric is selectively removed only in specific regions where backside contacts are needed, rather than removing the entire dielectric layer across the whole substrate. This segmented approach provides access to backside source/drain contacts while preserving the substrate surface and transistor structures in other regions.
Solution Approach 2:
The dielectric removal and contact formation process is applied locally only where needed, with different regions of the substrate having different structures - some with backside contacts and others without. This local quality approach allows backside contact access in specific areas while maintaining substrate integrity in other areas.
2Ease of operation
If backside contacts are formed, then source/drain contacts can be accessed from the backside, but alignment difficulties arise between contacts and source/drain structures
Solution Approach 1:
The method performs preliminary actions during frontside processing to establish alignment references and prepare the substrate for backside contact formation. By pre-defining contact locations and creating alignment markers on the frontside before flipping the substrate, the system ensures precise alignment between backside contacts and source/drain structures without requiring complex alignment steps after substrate replacement.
Solution Approach 2:
The substrate and previously formed frontside structures serve as their own alignment references for backside contact formation. The frontside interconnect layers and transistor structures provide inherent alignment cues that guide the backside contact etching and formation processes, eliminating the need for separate alignment mechanisms or tools.
3Productivity
If the entire substrate is processed for backside contact formation, then all source/drain structures can access backside contacts, but the fabrication process becomes more complex and time-consuming
Solution Approach 1:
Instead of processing the entire substrate uniformly for backside contact formation, the method applies partial action by selectively forming backside contacts only in regions where they are needed. This approach achieves comprehensive backside contact coverage in necessary areas while avoiding unnecessary processing steps in other areas, thereby reducing overall fabrication complexity and time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of backside source/drain contacts that are insulated from substrate remnants without bottom dielectric isolation, facilitating more reliable and efficient fabrication processes.
Implementation Method 1
a sigma-profiled dielectric structure that insulates first and second sides of the backside contact from the substrate
Implementation Method 2
using epitaxial growth to create source/drain structures and sacrificial placeholders
Data Source
AI summary
A CMOS apparatus includes a semiconductor substrate that has a frontside and a backside opposite the frontside; a source/drain structure, which is disposed at the frontside of the substrate and has a backside that is adjacent to the substrate and a frontside that is opposite the backside of the source/drain structure; a backside interconnect layer, which is disposed at the backside of the substrate; a backside contact, which penetrates the substrate and electrically connects the source/drain structure to the backside interconnect layer; and a sigma-profiled dielectric structure that insulates first and second sides of the backside contact from the substrate.