CMOS Image Sensor Bit Inversion for Current Stabilization

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Solution Overview

Problem

CMOS image sensors face challenges in reducing A/D conversion errors due to changes in consumption current during horizontal transfer operations, which affect image quality, and existing technologies fail to effectively manage these errors.

Innovation Solution

The imaging device incorporates column signal processing units with A/D conversion, memory units, and a bit value inversion or scrambling unit to manage digital data output, thereby reducing fluctuations in consumption current and minimizing A/D conversion errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If digital data is sequentially transferred through a common output line in a pipeline process, then framerate is improved, but consumption current changes cause A/D conversion errors

Engineering Contradiction:
ImproveframerateVSAvoidA/D conversion accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent applies periodic action by inverting bit values at regular intervals (every other column) during the horizontal transfer phase. This periodic inversion creates a predictable pattern of current consumption that stabilizes the overall current draw, thereby reducing A/D conversion errors while maintaining the high framerate enabled by the pipeline process

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent changes the parameter of digital data representation by inverting bit values (0 becomes 1, 1 becomes 0) for alternating columns during horizontal transfer. This parameter change transforms the current consumption pattern from variable (dependent on image content) to controlled (periodic inversion), stabilizing the A/D conversion process without sacrificing transfer speed

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If bit value inversion is applied to stabilize consumption current, then A/D conversion error is reduced, but image data fidelity may be affected

Engineering Contradiction:
ImproveA/D conversion accuracyVSAvoidimage data accuracy
Core Design Contradiction:
Measurement precisionVSLoss of information

Solution Approach 1:

The patent applies inversion in a controlled manner during the horizontal transfer phase (not during pixel readout), inverting bit values for alternating columns to stabilize current consumption. The A/D converter then converts these inverted values, and the system accepts the inverted digital output as the final image data, effectively using inversion to improve precision without traditional information loss

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent converts the harmful effect of variable current consumption into a beneficial stabilized current pattern by deliberately applying periodic bit inversion. The horizontal transfer operation, which originally caused current fluctuations and conversion errors, is transformed into a current-stabilizing mechanism through controlled bit value inversion, turning a source of error into a source of precision improvement

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS10834354B2Imaging device, imaging system, movable object, and signal processing device
Publication Date: 2020.11.10 CANON KK
  • US10834354B2 patent drawing
  • US10834354B2 patent drawing
  • US10834354B2 patent drawing

AI summary

An imaging device includes: a plurality of pixels arranged to form rows and columns and each configured to output a signal in accordance with an incident light, a plurality of column signal processing units provided in association with the columns and each having an A/D conversion unit that performs A/D conversion on a signal output from the pixels arranged on a corresponding column, a plurality of memory units provided in association with the columns and each having a memory that holds digital data output from the column signal processing unit of a corresponding column, a transfer unit that sequentially outputs the digital data held in each of the plurality of memory units to a common output line, and a bit value inversion unit that inverts a value of a bit of one of first and second digital data sequentially output to the common output line.