CMOS Image Sensor Blocking Layer Prevents Impurity Diffusion
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Solution Overview
Problem
CMOS image sensors suffer from white spots and low resolution due to undesired impurities introduced during the ion implantation process, which distort images and reduce picture quality.
Innovation Solution
A method of manufacturing CMOS image sensors that involves forming epitaxial layers and using blocking layers to prevent the diffusion of impurities into the floating diffusion layer and photodiode, thereby preventing white spots and enhancing resolution and electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the same ion implantation process and mask are used to form impurity regions in both the floating diffusion layer and peripheral circuit region, then the fabrication process is simplified, but undesired impurities (metal ions) are introduced to the floating diffusion layer or photodiode causing white spots and dark currents
Solution Approach 1:
The patent divides the ion implantation process into separate steps: a first ion implantation process forms impurity regions in the peripheral circuit region, and a second ion implantation process forms impurity regions in the floating diffusion layer. This segmentation allows different implantation conditions and masks to be used for each region, preventing metal ion contamination in the floating diffusion layer while maintaining fabrication efficiency.
Solution Approach 2:
The patent applies different ion implantation conditions to different regions: the peripheral circuit region receives one set of implantation parameters, while the floating diffusion layer receives a different set. This local quality approach ensures that each region gets the optimal implantation treatment without compromising the other, specifically preventing white spots in the floating diffusion layer.
2Manufacturing precision
If multiple separate ion implantation processes are used to form impurity regions in different regions, then impurity control is improved, but the fabrication process complexity increases
Solution Approach 1:
The patent combines multiple ion implantation processes into a unified fabrication sequence where the first and second ion implantation processes are performed in succession using different masks. This merging approach maintains precise impurity control while streamlining the overall process flow, avoiding the need for completely separate fabrication lines or equipment.
Solution Approach 2:
The patent performs the first ion implantation process to form impurity regions in the peripheral circuit region before forming the photodiode and floating diffusion layer. This preliminary action establishes the electrical characteristics of the peripheral circuits early in the process, allowing subsequent steps to focus on the sensor regions without interference.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents the occurrence of white spots, resulting in improved resolution and electrical characteristics of CMOS image sensors, making them suitable for use in imaging devices like camera phones.
Implementation Method 1
A blocking layer may be formed on the gate structures and the epitaxial layer... prevent the diffusion of impurities into the floating diffusion layer and photodiode
Implementation Method 2
A first lightly-doped impurity layer may be formed at (or in) an upper portion of the epitaxial layer using a first mask and the gate structures as an ion implantation mask
Data Source
AI summary
Complementary metal-oxide semiconductor (CMOS) image sensors (CIS) and methods of manufacturing the same are provided, the sensors include an epitaxial layer on a substrate in which a first, second, third and fourth region are defined. A photodiode may be formed at an upper portion of the epitaxial layer in the first region. A plurality of gate structures may be formed on the epitaxial layer in the second, third and fourth regions. A first blocking layer may be formed on the gate structures and the epitaxial layer in the first and second regions. A first impurity layer may be formed at an upper portion of the epitaxial layer adjacent to the gate structures in the second region, and a second impurity layer at upper portions of the epitaxial layer adjacent to the gate structures in the third and fourth regions. A color filter layer may be formed over the photodiode. A microlens may be formed on the color filter layer.