CMOS Analog Input Buffer With Supply-Compensated Biasing

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Solution Overview

Problem

Existing analog input buffers are susceptible to power supply noise, which affects their performance and output signals, necessitating improved noise rejection mechanisms.

Innovation Solution

The implementation of a CMOS signal buffer with specific transistor and capacitor configurations that generate power supply-compensated bias signals, reducing sensitivity to power supply and ground noise, and increasing stability through the use of capacitors for high-frequency signal paths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional analog input buffer is used, then the circuit can receive and buffer analog signals, but the buffer is susceptible to power supply noise which affects performance and output signals

Engineering Contradiction:
Improvepower supply noise rejectionVSAvoidbuffer circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary compensation circuit that generates a noise signal proportional to power supply variations. This noise signal is then subtracted from the main signal path through a differential configuration, effectively canceling out the power supply noise without requiring complex filtering or shielding in the main buffer path.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs a feedback mechanism where a portion of the power supply noise is sensed through a coupling capacitor and fed back to the differential input. The feedback signal is amplified and subtracted from the main signal, creating a closed-loop system that actively compensates for power supply variations and maintains stable output despite noise disturbances.

Inventive Principle:
Principle #23Feedback

2Object-affected harmful factors

If the buffer circuit is designed to reject power supply noise, then noise rejection improves, but the circuit complexity increases due to additional components

Engineering Contradiction:
Improvepower supply noise sensitivityVSAvoidnumber of transistors and capacitors
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges the noise compensation function with the main buffer operation by using a differential pair configuration. The same transistors that amplify the input signal also participate in noise rejection through the differential subtraction process, eliminating the need for separate compensation circuits and reducing overall component count.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The coupling capacitor and associated transistors serve multiple functions: they couple power supply noise to the compensation path, enable differential signal processing, and provide gain control. This multi-functionality reduces the need for dedicated components for each function, thereby limiting the increase in circuit complexity while achieving effective noise rejection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11183992B1Analog input buffer
Publication Date: 2021.11.23 XILINX INC
  • US11183992B1 patent drawing
  • US11183992B1 patent drawing
  • US11183992B1 patent drawing

AI summary

A signal buffer is disclosed. The signal buffer may include one or more bias signal generators to bias one or more transistors. The bias signal generators may generate power supply compensated or ground compensated bias signals. The bias signal generators may include a capacitor to provide a high frequency signal path.