CMOS Output Buffer Switching for Lower MOSFET On-Resistance
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Solution Overview
Problem
Existing CMOS driving circuits for power MOSFETs face limitations in output power due to high on-resistance, which increases cost when trying to enhance output power by increasing transistor area, and struggle to utilize high-voltage driving capacity effectively in multi-voltage systems.
Innovation Solution
A CMOS driving circuit with an output buffer stage that includes a comparator and two converting circuits to convert the higher of two DC input voltages into a modulated driving voltage, reducing on-resistance and power consumption by dynamically switching between input voltages based on comparison results and timing signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the area of power MOSFET is increased to reduce on-resistance and improve output power, then the output power is improved, but the cost of integrated circuit is increased
Solution Approach 1:
The patent changes the voltage parameter (VGS-VT) by introducing a higher voltage DC input terminal to increase the over-driving voltage, which reduces on-resistance and improves output power without increasing transistor area, thus avoiding increased manufacturing cost
2Power
If the over driving voltage (VGS-VT) is increased to reduce on-resistance and improve output power, then the output power is improved, but the device complexity is increased
Solution Approach 1:
The patent introduces a dynamic voltage switching mechanism where a transistor switch dynamically selects between different DC input voltages based on timing signals, enabling variable over-driving voltage that optimizes output power while managing device complexity through controlled switching
Solution Approach 2:
The patent uses periodic timing signals to control the switching between different voltage levels, creating a rhythmic pattern of voltage application that maintains optimal operating conditions while managing device complexity through predictable periodic operation
3Device complexity
If a traditional CMOS driving circuit with single DC voltage input is used, then the circuit structure is simple, but the high-voltage driving capacity cannot be utilized effectively in multi-voltage systems
Solution Approach 1:
The patent creates a multi-functional driving circuit that can operate with multiple DC input voltages, enabling the circuit to adapt to different voltage requirements in multi-voltage systems while maintaining reasonable structural complexity through systematic design
Data Source
AI summary
A CMOS driving circuit, wherein an output buffer stage with a transistor switch is added to the final buffer stage of a conventional CMOS driving circuit to drive a power transistor. The output buffer stage has two input terminals for DC input voltage, and uses the high voltage of a voltage converting circuit in a multi-voltage system as one DC input voltage. The driving load capacity of the CMOS driving circuit is improved by converting the higher of the two DC input voltages to a modulated driving voltage and outputting it via an output terminal, so that the on-resistance of a power transistor connected with the output buffer stage is lowered, the power consumption of the power transistor is reduced, the output capacity is improved, and the area of the power transistor is lowered with the same output power.