CMOS Image Sensor Burst Reset Potential Well
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Solution Overview
Problem
CMOS image sensors face limitations in dynamic range and signal-to-noise ratio due to kTC noise and voltage swing constraints, particularly in small pixel designs where the floating diffusion node is reset to a Vdd bias level, limiting charge storage capacity and dynamic range.
Innovation Solution
The introduction of a burst reset pulse mechanism and a potential well underneath the reset transistor gate, allowing the floating diffusion node to be reset to a level significantly above Vdd, combined with a pinned potential barrier, reduces kTC noise and increases charge storage capacity and voltage swing without increasing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the floating diffusion node is reset to Vdd bias level in small pixel designs, then the pixel size is reduced, but the charge storage capacity and dynamic range are limited
Solution Approach 1:
The patent introduces a potential well structure underneath the gate of the reset transistor, creating a third dimensional charge storage region below the floating diffusion node. This vertical charge storage dimension allows increased charge capacity without expanding the lateral pixel footprint, directly resolving the contradiction between small pixel size and adequate charge storage capacity
Solution Approach 2:
The patent embeds the potential well structure within the existing reset transistor architecture, nesting the charge storage function inside the transistor gate region. This nested configuration enables dual functionality of the reset transistor - both resetting the floating diffusion and storing signal charge in the potential well, thereby increasing charge storage capacity without adding separate structures that would enlarge pixel area
2Device complexity
If the floating diffusion node is reset to Vdd bias level, then the circuit operation is simplified, but the voltage swing and signal-to-noise ratio are reduced
Solution Approach 1:
The patent segments the charge storage function into two distinct regions: the floating diffusion node for circuit operation and the potential well for signal charge storage. This segmentation allows the floating diffusion to be reset to Vdd level for simplified circuit operation while the potential well maintains larger voltage swing capability for improved signal-to-noise ratio, resolving the contradiction between circuit simplicity and measurement precision
Solution Approach 2:
The potential well acts as an intermediary charge storage region between the photodiode and the floating diffusion node. It receives signal charge during integration and can transfer it to the floating diffusion for readout, enabling the floating diffusion to operate at simplified Vdd reset level while the intermediary potential well preserves the voltage swing needed for high signal-to-noise ratio
3Speed
If a single reset pulse is used, then the reset operation is fast, but kTC noise is generated and dynamic range is limited
Solution Approach 1:
The patent employs periodic burst reset pulses applied to the reset transistor gate instead of a single reset pulse. This periodic action gradually transfers charge from the floating diffusion to the potential well over multiple cycles, achieving reset functionality while distributing the charge transfer process in time. This reduces the instantaneous charge transfer that causes kTC noise while maintaining reset speed through the efficient potential well structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the dynamic range and signal-to-noise ratio of CMOS image sensors by allowing higher charge storage and voltage swing, while maintaining small pixel size and reducing reset noise, thus improving overall sensor performance.
Implementation Method 1
a potential well incorporated underneath the gate
Implementation Method 2
A typical pixel of the CMOS image sensor includes a photodiode, more precisely a pinned photodiode, and four transistors. The photodiode collects a photo-generated charge
Data Source
AI summary
A reset transistor includes a floating diffusion region for detecting a charge, a junction region for draining the charge, a gate for controlling a transfer of the charge from the floating diffusion region to the junction region upon receipt of a reset signal, and a potential well incorporated underneath the gate.