CMOS Circuit Integrating ADCs and DSP for 5G Data Aggregation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current 5G networks face challenges in efficiently aggregating and transmitting data streams from multiple radio signals due to the lack of a standard device for efficient analog-to-digital and digital-to-analog conversion, leading to high costs and power consumption from using disparate ADCs, DACs, and FPGAs.

Innovation Solution

A CMOS integrated circuit with integrated digital-to-analogue converters (DACs), analogue-to-digital converters (ADCs), and a digital signal processor (DSP) that combines data streams, provides translation between digital and analog formats, and transmits encoded data using millimeter wave technology, reducing the need for multiple components and improving power efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If disparate ADCs, DACs, and FPGAs are used for data conversion and processing, then data processing functionality is achieved, but cost and power consumption increase significantly

Engineering Contradiction:
Improvedata processing functionalityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent combines multiple discrete components (ADCs, DACs, and FPGAs) into a single integrated CMOS circuit. This merging eliminates the need for separate power supplies and control logic for each component, thereby reducing overall power consumption while maintaining full data processing functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The CMOS circuit is designed to perform multiple functions within a single device: digital-to-analog conversion, analog-to-digital conversion, and signal processing. This multi-functionality replaces the need for multiple specialized components, reducing both power consumption and system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If multiple discrete components (ADCs, DACs, FPGAs) are used, then data conversion and processing capabilities are provided, but device complexity and cost increase

Engineering Contradiction:
Improvedata conversion capabilityVSAvoidnumber of components
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent integrates ADCs, DACs, and FPGAs into a single CMOS circuit, reducing the number of discrete components from three separate devices to one unified device. This integration maintains all necessary conversion and processing capabilities while simplifying the overall system architecture.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single CMOS circuit is designed to provide multiple conversion and processing functions that were previously distributed across multiple components. The circuit includes dedicated ADC modules, DAC modules, and FPGA-like programmable logic, all within one device, thereby maintaining versatility while reducing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If multiple discrete components are used for data aggregation, then data stream processing is achieved, but integration and synchronization become difficult

Engineering Contradiction:
Improvedata aggregation efficiencyVSAvoidintegration complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple data stream processing functions into a single CMOS circuit with unified control logic. This integration eliminates the synchronization and integration challenges associated with coordinating multiple discrete components, as all processing occurs within one device under centralized control.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11923910B1CMOS circuit
Publication Date: 2024.03.05 ACACIA TECH INC
  • US11923910B1 patent drawing
  • US11923910B1 patent drawing
  • US11923910B1 patent drawing

AI summary

A CMOS integrated circuit comprising digital-to-analogue converters (DACs), analogue-to-digital converters (ADCs), a digital signal processor (DSP), on-chip switching, an on-chip processor; and logic enabling to receive data from data sources in a 5G network, combine the data from the data sources into a single data stream, encode the single data stream using the DSP, and cause the encoded single data stream to be transmitted to another device in the 5G network.