CMOS Clearing Circuit Using Pulse Control Instead of Manual Jumpers

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Solution Overview

Problem

Existing methods for clearing CMOS data in electronic devices require manual intervention by users, incurring labor and time costs, which is inefficient and inconvenient.

Innovation Solution

A CMOS data clearing circuit that automatically generates a pulse signal to control the control chip to clear CMOS data, eliminating the need for manual jumper operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If manual jumper operations are used to clear CMOS data, then the clearing function can be achieved, but labor cost and time cost increase

Engineering Contradiction:
ImproveCMOS data clearing automationVSAvoidtime cost for clearing CMOS data
Core Design Contradiction:
Extent of automationVSLoss of time

Solution Approach 1:

The system performs CMOS data clearing automatically through the activation component and controller, eliminating the need for manual user intervention. The controller detects the activation signal and autonomously executes the clearing sequence by controlling the connection port to short the appropriate pins.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The clearing mechanism is pre-configured in the circuit design, with the connection port and pin header arranged to enable automatic clearing when activated. The controller is pre-programmed with the clearing logic, so upon receiving the activation signal, the system immediately executes the predetermined clearing sequence without requiring user knowledge of the manual process.

Inventive Principle:
Principle #10Preliminary action

2Extent of automation

If manual jumper operations are used to clear CMOS data, then the clearing function can be achieved, but labor cost increases

Engineering Contradiction:
ImproveCMOS data clearing automationVSAvoidmanufacturing complexity of clearing mechanism
Core Design Contradiction:
Extent of automationVSEase of manufacture

Solution Approach 1:

The connection port serves multiple functions: it acts as a regular I/O interface during normal operation and as a CMOS clearing interface when activated. The activation component can be integrated with existing system components (such as keyboard controllers or power management circuits), eliminating the need for dedicated clearing hardware and reducing overall manufacturing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The controller acts as an intermediary between the activation component and the connection port, managing the clearing sequence through software control. This approach is simpler than designing complex hardware switching circuits, as the controller can be implemented using existing microcontroller or CPU resources already present in the system.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If automatic clearing mechanism is implemented, then labor cost and time cost are reduced, but device complexity increases

Engineering Contradiction:
Improveclearing efficiencyVSAvoidcircuit complexity for automatic clearing
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The CMOS clearing function is merged with the existing pin header structure and connection port infrastructure. The same physical pins used for normal I/O operations are repurposed for clearing when activated, eliminating the need for separate dedicated clearing circuitry and reducing overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system uses parameter changes (voltage transitions and timing sequences) to trigger and control the clearing process. By varying the electrical parameters of signals applied to the pin header, the controller can initiate and manage the clearing sequence without requiring additional hardware components, thus maintaining simplicity while achieving automatic operation.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12609698B2CMOS data clearing circuit
Publication Date: 2026.04.21 ASROCK IND COMPUTER CORP
  • US12609698B2 patent drawing
  • US12609698B2 patent drawing
  • US12609698B2 patent drawing

AI summary

A CMOS data clearing circuit is provided. The CMOS data clearing circuit is configured to clear CMOS data of a main board of an electronic device. The electronic device includes a control chip and a pin header. The CMOS data clearing circuit includes a controller and a connection port. The controller generates a pulse signal and an operation signal. The connection port has an input pin and an output pin. The output pin is coupled to a first pin of the pin header. The connection port connects the input pin to the output pin in response to the operation signal, so as to transmit the pulse signal to the first pin of the pin header via the output pin. The control chip clears the CMOS data of the main board according to the pulse signal received by the first pin.