Self-Calibrating CMOS Clock Buffer for Ripple-Prone PCB Traces
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Solution Overview
Problem
Image sensor reference clock signals experience signal ripples and slope changes due to impedance mismatch in long PCB traces or flex cables, making it difficult to determine suitable thresholds for clock high and low states, which impacts image sensor performance and timing budgets.
Innovation Solution
Implementing a Schmitt trigger-based reference clock input buffer with adjustable transistors of varying sizes and input voltage ranges to control the rising and falling edges, avoiding voltage ripples and improving electrostatic discharge protection, thereby reducing jitter noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If reference clock signals are transmitted through long PCB traces or flex cables, then image sensor connectivity is achieved, but signal ripples and slope changes occur due to impedance mismatch
Solution Approach 1:
The patent changes the electrical parameters of the buffer circuit by using adjustable transistors with varying sizes and input voltage ranges to adapt to different signal conditions caused by long trace lengths, thereby maintaining signal integrity despite impedance mismatch
Solution Approach 2:
The buffer circuit acts as an intermediary between the reference clock source and the image sensor, conditioning the signal to compensate for degradation caused by long PCB traces or flex cables
2Ease of operation
If signal thresholds are determined in the presence of voltage ripples, then clock high and low states can be defined, but timing precision deteriorates due to slope changes
Solution Approach 1:
The patent implements dynamic adjustment of transistor sizes and input voltage ranges to adapt the buffer characteristics to the actual signal conditions, enabling precise threshold determination even in the presence of voltage ripples and slope changes
3Device complexity
If standard CMOS input buffers are used, then circuit simplicity is maintained, but electrostatic discharge protection is insufficient
Solution Approach 1:
The patent segments the buffer circuit into multiple adjustable transistor stages, where each transistor can be independently sized and voltage-ranged to provide both signal conditioning and electrostatic discharge protection functions
Data Source
AI summary
Reference clock CMOS input buffer with self-calibration and improved ESD performance. In one embodiment, a reference clock input buffer of an image sensor includes a Schmitt trigger configured to generate a clock signal having a falling edge and a rising edge. The falling edge and the rising edge are separated by a hysteresis voltage. The Schmitt trigger includes a plurality of output switches and a plurality of voltage control switches that are individually coupled to individual output switches [M2-i] of the plurality of output switches. Voltage of the falling edge signal or the rising edge signal of the Schmitt trigger is adjustable by selectively switching at least one voltage control switch of the plurality of voltage control switches.