CMOS Compact Modeling for Cryogenic PDK Re-Centering
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Solution Overview
Problem
The lack of foundry Process Development Kits (PDKs) for CMOS devices designed for cryogenic temperatures poses challenges in ensuring consistent transistor characteristics, as conventional re-centering methods fail to guarantee accuracy between typical-typical transistors and those fabricated on silicon chips.
Innovation Solution
A method involving the use of room-temperature TCAD models, fitting structural and carrier transport parameters to measured characteristics, and calibrating at cryogenic temperatures to determine compact model parameters for CMOS devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional re-centering methods are used to adapt room-temperature PDKs to cryogenic temperatures, then some level of cryogenic operation is enabled, but the transistor characteristics cannot be guaranteed to match typical-typical specifications
Solution Approach 1:
The method performs preliminary fitting of structural parameters to room-temperature measured characteristics before cryogenic operation. This preliminary calibration ensures that the TCAD model accurately represents actual device characteristics at room temperature, which then serves as a reliable foundation for extracting cryogenic compact model parameters, thereby guaranteeing characteristic consistency across temperature ranges.
Solution Approach 2:
The method changes the temperature parameter from room temperature to cryogenic temperature in a controlled manner. By fitting structural parameters at room temperature and then using these fitted parameters to determine carrier transport parameters at cryogenic temperatures, the method systematically adapts the model parameters to different temperature conditions while maintaining characteristic consistency.
2Measurement precision
If cryogenic PDK development is pursued to ensure accurate transistor characteristics at cryogenic temperatures, then modeling accuracy is improved, but the development cost becomes prohibitive
Solution Approach 1:
The method introduces a TCAD model as an intermediary between room-temperature measurements and cryogenic compact models. Instead of directly developing cryogenic PDKs through expensive cryogenic measurements and model fitting, the TCAD model serves as a mediator that translates room-temperature fitted parameters into accurate cryogenic compact model parameters, significantly reducing development cost while maintaining accuracy.
Solution Approach 2:
The method creates a virtual copy of the transistor behavior through TCAD simulation. By fitting the TCAD model to room-temperature measured characteristics and then using this virtual model to predict cryogenic behavior, the method avoids the need for expensive physical cryogenic measurements and PDK development, achieving accurate cryogenic modeling through simulation copying.
3Ease of manufacture
If foundry PDKs are designed for room-temperature operation, then standard manufacturing processes can be used, but the PDKs cannot guarantee accurate characteristics for cryogenic applications
Solution Approach 1:
The method performs preliminary fitting of structural parameters to room-temperature measured characteristics before cryogenic operation. This preliminary calibration ensures that the TCAD model accurately represents actual device characteristics at room temperature, which then serves as a reliable foundation for extracting cryogenic compact model parameters, thereby guaranteeing characteristic consistency across temperature ranges.
Solution Approach 2:
The method changes the temperature parameter from room temperature to cryogenic temperature in a controlled manner. By fitting structural parameters at room temperature and then using these fitted parameters to determine carrier transport parameters at cryogenic temperatures, the method systematically adapts the model parameters to different temperature conditions while maintaining characteristic consistency.
Data Source
AI summary
The method is directed to determining compact model parameters for modelling CMOS devices at cryogenic temperatures. The method includes: obtaining (110) a room-temperature TCAD model of CMOS devices: fitting (118) a structural parameter of the room-temperature TCAD model to room-temperature measured characteristics of first CMOS devices, to produce a shifted TCAD model: fitting (128) a carrier transport parameter of the shifted TCAD model to cryogenically measured characteristics of the first CMOS devices, to determine a cryogenically-fitted carrier transport parameter; and running (132, 136) a room-temperature TCAD model of CMOS devices using the cryogenically-fitted carrier transport parameter to determine compact model parameters. The method allows measurement data from a ‘non-ideal’ silicon wafer to be used in a TCAD-based cryogenic PDK recentering process, which may also be used to generate target data for the corner transistors in the recentered PDK.


