CMOS DC-DC Converter for Negative Voltage Generation
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Solution Overview
Problem
Current DC-DC converters for RF antenna switches in GaAs technology require large die area and high current consumption due to the lack of complementary semiconductor devices, leading to performance variations and inefficiencies in generating negative voltage references.
Innovation Solution
Implementing a CMOS-based DC-DC converter using charge pumps with p-type and n-type metal-oxide-semiconductor transistors and capacitors, driven by a two-phase clock, to generate a negative output voltage efficiently, reducing the need for costly GaAs die area and minimizing current drain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a positive voltage doubler design is used in GaAs die to generate negative voltage reference, then the negative voltage can be generated, but the GaAs die area occupied is large and costly
Solution Approach 1:
The patent uses a CMOS process to create a functional copy of the voltage generation capability, replacing the GaAs-based positive voltage doubler with a CMOS-based DC-DC converter that generates the same negative voltage reference function using complementary n-type and p-type switching devices
Solution Approach 2:
The patent changes the fundamental parameter of semiconductor device type from single-type (n-type only in GaAs) to complementary types (both n-type and p-type in CMOS), enabling more efficient voltage conversion with reduced area by utilizing the advantageous properties of both device types working together
2Reliability
If a positive voltage doubler design is used in GaAs die, then negative voltage can be generated, but current drain is large due to extra circuitry and gate leakage
Solution Approach 1:
The patent replaces the GaAs-based voltage generation circuitry with a CMOS-based DC-DC converter that copies the negative voltage generation function but achieves it with lower current consumption by utilizing complementary switching devices that reduce gate leakage and eliminate the need for extra circuitry
Solution Approach 2:
The patent converts the inherent gate leakage issue in pHEMT technology into a benefit by using CMOS technology where complementary n-type and p-type devices work together to cancel out leakage effects, turning what was a harmful artifact into an advantageous feature
3Reliability
If a positive voltage doubler design is used in GaAs die, then negative voltage reference can be generated, but performance variation is wide
Solution Approach 1:
The patent uses CMOS process technology to create a more precise copy of the voltage generation function, where complementary n-type and p-type switching devices provide better matching and more consistent performance across manufacturing variations compared to single-type GaAs devices
Solution Approach 2:
The patent changes the device technology parameter from pHEMT to CMOS, which provides better control over switching characteristics and reduces performance variation through the complementary nature of the devices, leading to more consistent negative voltage generation across different manufacturing batches
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The CMOS-based DC-DC converter effectively generates a negative output voltage with reduced area and power consumption, improving the performance and reliability of RF antenna switches by utilizing complementary switching devices and a two-phase clock mechanism.
Implementation Method 1
The charge pumps may include p-type and n-type metal-oxide-semiconductor transistors and capacitors
Data Source
AI summary
Disclosed embodiments include a direct current to direct current (DC-DC) converter including one or more charge pumps and configured to receive an input voltage and a first clock signal and a second clock signal. The first clock signal and second clock signal may be non-overlapping, and each may alternate between a ground voltage and a first voltage. The DC-DC converter may be configured to produce an output voltage over the clock cycle that has a negative polarity with a magnitude substantially equal to a sum of magnitudes of the input voltage and an integer multiple of the first voltage, the integer multiple being equal to a number of the one or more charge pumps in the DC-DC converter.


