CMOS Op-Amp Differential Pair for Stable Common-Mode Input Offset
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Solution Overview
Problem
Operational amplifiers with differential pairs in CMOS technology suffer from input offset variations with common-mode values, which is undesirable in electronic circuits.
Innovation Solution
A differential pair design with two identical branches of cascode-assembled MOS transistors, where the first transistors have a larger dimension ratio and a potential difference applied between the source and channel-forming region to maintain a constant drain-source voltage, ensuring operation in saturation state and independence from common-mode input values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a differential pair with MOS transistors is used in the input stage of an operational amplifier, then the amplifier can be implemented in CMOS technology, but the input offset varies with the common-mode value applied between the inputs
Solution Approach 1:
The patent applies a potential difference between the source and channel-forming region of the first transistors before the differential pair operates. This preliminary action increases the turn-on threshold and ensures that the drain-source voltage remains constant regardless of common-mode input variations, thereby preventing input offset variation from the outset
Solution Approach 2:
The patent changes the dimension ratio of the first transistors relative to the second transistors (X times larger, where X is in the range from 4 to 10). This parameter change in transistor dimensions, combined with the applied potential difference, modifies the electrical characteristics to maintain constant drain-source voltage and stable input offset across different common-mode values
2Measurement precision
If the dimension ratio of first transistors is increased relative to second transistors, then the input offset becomes more stable, but the device complexity increases
Solution Approach 1:
The patent systematically adjusts the dimension ratio parameter (X times larger, where X is in the range from 4 to 10, preferably 5 to 6) to achieve the desired input offset stability. This controlled parameter change provides a predictable design methodology that balances performance improvement with manufacturing feasibility
Data Source
AI summary
A differential pair for an input stage includes two identical branches in parallel, each branch including a first MOS transistor and a second MOS transistor arranged in series, wherein the first transistor and the second transistor have a channel of the same type, and wherein each of the first transistor and the second transistor has a gate coupled to the same corresponding input of the differential pair and a circuit configured to apply to each of the first transistors a potential difference between a source and a channel-forming region of the first transistor.